Generating new benchmark designs using a multi-terminal net model

Integration, the VLSI Journal

Volumn 27, Issue 2, 1999, Pages 113-129

  Stroobandt, Dirk ^a   Depreitere, Jo ^a   Campenhout, Jan Van ^a  

^a GHENT UNIVERSITY   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED LOGIC DESIGN; INTEGRATED CIRCUIT LAYOUT;

NET DEGREE DISTRIBUTIONS; RENT'S RULE;

MICROPROCESSOR CHIPS;

EID: 0032682999     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-9260(99)00002-4     Document Type: Article

References (17)

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