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Volumn 9, Issue 2 PART 3, 1999, Pages 3829-3832

A reentrant delay-line memory using a YBa2Cu3O7-δ coplanar delay-line

Author keywords

[No Author keywords available]

Indexed keywords

ASSEMBLY; ASYNCHRONOUS TRANSFER MODE; BUFFER STORAGE; FABRICATION; TELECOMMUNICATION TRAFFIC;

EID: 0032646033     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/77.783862     Document Type: Article
Times cited : (7)

References (13)
  • 1
    • 0029405910 scopus 로고    scopus 로고
    • vol. 33. pp. 64-71,Nov. 1995.
    • E. Munter, J. Parker, and P. Kirkby, A high-capacity ATM switch based on advanced electronic and optical technologies," IEEE Commun. Mag., vol. 33. pp. 64-71,Nov. 1995.
    • IEEE Commun. Mag.
    • Munter, E.1    Parker, J.2    Kirkby, P.3
  • 3
    • 0041635643 scopus 로고    scopus 로고
    • Multichip module using multilayer YBa2Cu,O,<, interconnects, 62. pp. 1435-1437, March 1993.
    • M. J. Bums, K. Char, B. F. Cole, W. S. Ruby, and S. A. Sachtjen, "Multichip module using multilayer YBa2Cu,O,<, interconnects," Appl Phys. Lett.. 62. pp. 1435-1437, March 1993.
    • Appl Phys. Lett..
    • Bums, M.J.1    Char, K.2    Cole, B.F.3    Ruby, W.S.4    Sachtjen, S.A.5
  • 5
    • 0031332188 scopus 로고    scopus 로고
    • Recent Advances in High Temperature Superconductor Multichip Modules, 6th International Conference on Multichip Modules, pp. 115-120, 1997.
    • |5J J. W. Cooksey, S. S. Scott, W. D. Brown, S. S. Ang, R. G. Florence, S. Afonso, "Recent Advances in High Temperature Superconductor Multichip Modules," 6th International Conference on Multichip Modules, pp. 115-120,1997.
    • Cooksey, J.J.W.1    Scott, S.S.2    Brown, W.D.3    Ang, S.S.4    Florence, R.G.5    Afonso, S.6
  • 6
    • 0032163810 scopus 로고    scopus 로고
    • A 5-|jjn-wide 18-cm-long Low-loss YBa2CuiO7<; Coplanar Line for Future Multichip Module Technology, September 1998.
    • W. Hattori, T Yoshitake. and S.Tahara, "A 5-|jjn-wide 18-cm-long Low-loss YBa2CuiO7<; Coplanar Line for Future Multichip Module Technology," to be published in IEEE Trans. Appl. Supercond, September 1998.
    • IEEE Trans. Appl. Supercond
    • Hattori, W.1    Yoshitake, T.2    Tahara, S.3
  • 8
    • 0031210831 scopus 로고    scopus 로고
    • A GaAs HBT 16x 16 10 Gb/s/channel crosspoint switch, vol. 32, no.8pp.!263-1268, Aug. 1997.
    • K. S. Lowe, "A GaAs HBT 16x 16 10 Gb/s/channel crosspoint switch," IEEE J. Solid-State Circuits, vol. 32, no.8pp.!263-1268, Aug. 1997.
    • IEEE J. Solid-State Circuits
    • Lowe, K.S.1
  • 11
    • 0023090326 scopus 로고    scopus 로고
    • An experimental photonic time-slot interchanger using optical fibers as reentrant delay-line memories, 5,no. 1pp. 154-162, Jan. 1987.
    • R A. Thompson and P. P Giordano, "An experimental photonic time-slot interchanger using optical fibers as reentrant delay-line memories," IEEE J. Lighneave Techno!.,\o\.L~T-5,no. 1pp. 154-162, Jan. 1987.
    • IEEE J. Lighneave Techno!.,\o\.L~T
    • Thompson, R.A.1    Giordano, P.P.2
  • 13
    • 0000342482 scopus 로고    scopus 로고
    • A Novel High-Spccd Latching Operation Flip-Flop (HLO-FF) Circuit and its Application to a 19-Gb/s FJecision Circuit Using a 0.2-um GaAs MESFET, vol. 30, no. 10, Oct. 1995.
    • For example, K. Murata, T. Otsuji, E. Sano, M. Ohhata, M. Togashi, M. Suzuki, "A Novel High-Spccd Latching Operation Flip-Flop (HLO-FF) Circuit and its Application to a 19-Gb/s FJecision Circuit Using a 0.2-um GaAs MESFET," IEEE J. Solid-State Circuits, vol. 30, no. 10, Oct. 1995.
    • IEEE J. Solid-State Circuits
    • Example, F.1    Murata, K.2    Otsuji, T.3    Sano, E.4    Ohhata, M.5    Togashi, M.6    Suzuki, M.7


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.