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Volumn 28, Issue 9, 1993, Pages 935-940

A 9.6-Gb/s HEMT ATM Switch LSI with Event-Controlled FIFO

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS SEQUENTIAL LOGIC; BUFFER CIRCUITS; FABRICATION; HIGH ELECTRON MOBILITY TRANSISTORS; LOGIC CIRCUITS; LOGIC DESIGN; LOGIC GATES; SWITCHING NETWORKS; SWITCHING SYSTEMS;

EID: 0027656936     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.236172     Document Type: Article
Times cited : (8)

References (9)
  • 1
    • 0002800218 scopus 로고
    • A development of a high speed ATM switching LSIC
    • Y. Kato et al., “A development of a high speed ATM switching LSIC,” in Proc. ICC, 1990, p. 310.3.
    • (1990) Proc. ICC , pp. 310.3
    • Kato, Y.1
  • 2
    • 0009771952 scopus 로고
    • A 600Mb/s 16×16 switching element chipset for broadband ISDN,” in ISSCC Dig. Tech. Papers
    • Feb.
    • L. Cloetens et al., ‘ “A 600Mb/s 16×16 switching element chipset for broadband ISDN,” in ISSCC Dig. Tech. Papers, Feb. 1991, 240–241.
    • (1991) , pp. 240-241
    • Cloetens, L.1
  • 3
    • 84933437031 scopus 로고
    • A 400Mb/s 8×8 BiCMOS ATM switch LSI with 128kb on-chip shared memory
    • Feb.
    • S. Tanaka etal, “A 400Mb/s 8×8 BiCMOS ATM switch LSI with 128kb on-chip shared memory,” in ISSCC Dig. Tech. Papers, Feb. 1991, pp. 242–243.
    • (1991) ISSCC Dig. Tech. Papers , pp. 242-243
    • Tanaka, S.1
  • 4
    • 0344665091 scopus 로고
    • A scheduling content- addressable memory for ATM space-division switch control
    • Feb.
    • M. Akata et al., “A scheduling content- addressable memory for ATM space-division switch control,” in ISSCC Dig. Tech. Papers, Feb. 1991, pp. 244–245.
    • (1991) ISSCC Dig. Tech. Papers , pp. 244-245
    • Akata, M.1
  • 5
    • 0024139536 scopus 로고
    • A half-micron HEMT LSI for a multi-bit data register
    • Feb.
    • Y. Watanabe et al., “A half-micron HEMT LSI for a multi-bit data register,” in ISSCC Dig. Tech. Papers, Feb. 1988, pp. 86–87.
    • (1988) ISSCC Dig. Tech. Papers , pp. 86-87
    • Watanabe, Y.1
  • 6
    • 0025450685 scopus 로고
    • A gigahertz cryogenic HEMT pseudorandom number generator chip set
    • Feb.
    • Y. Asada et al., “A gigahertz cryogenic HEMT pseudorandom number generator chip set,” in ISSCC Dig. Tech. Papers, Feb. 1990, pp. 186–187.
    • (1990) ISSCC Dig. Tech. Papers , pp. 186-187
    • Asada, Y.1
  • 7
    • 0026254856 scopus 로고
    • 1.2-ns HEMT 64-kb SRAM
    • Nov.
    • M. Suzuki et al., “1.2-ns HEMT 64-kb SRAM,” IEEE J. Solid-State Circuits, vol. 26, pp. 1571–1576, Nov. 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 1571-1576
    • Suzuki, M.1
  • 8
    • 0026254941 scopus 로고
    • A 45K-gate HEMT array with 35-ps DCFL and 50-ps BDCFL gates
    • Nov.
    • S. Notomi et al., “A 45K-gate HEMT array with 35-ps DCFL and 50-ps BDCFL gates,” IEEE J. Solid-State Circuits, vol. 26 pp. 1621–1625, Nov. 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 1621-1625
    • Notomi, S.1
  • 9
    • 0024683698 scopus 로고
    • Micropipelines
    • June
    • I. E. Sutherland, “Micropipelines,” Commun. Ass. Comput. Mach., vol. 32, no. 6, pp. 720–738, June 1989.
    • (1989) Commun. Ass. Comput. Mach. , vol.32 , Issue.6 , pp. 720-738
    • Sutherland, I.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.