33 GB/s 13.4 Mb integrated graphics accelerator and frame buffer

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 1998, Pages 340-341,-461

  Torrance, R ^a   Mes, I ^a   Hold, B ^a   Jones, D ^a   Crepeau, J ^a   DeMone, P ^a   MacDonald, D ^a   O'Connell, C ^a   Gillingham, P ^a   White, R ^a   Duggins, S ^a   Fielder, D ^a  

^a MOSAID Technologies Inc   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BANDWIDTH; BUFFER STORAGE; COMPUTER ARCHITECTURE; DIGITAL FILTERS; FORMAL LOGIC; INTERFACES (COMPUTER); LOGIC GATES; MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS; PERSONAL COMPUTERS; TIMING CIRCUITS;

DYNAMIC RANDOM ACCESS MEMORY (DRAM); FRAME BUFFERS; INTEGRATED GRAPHICS ACCELERATORS; PIXEL PROCESSING UNITS (PPU); SERIAL OUTPUT REGISTERS (SOR);

RANDOM ACCESS STORAGE;

EID: 0031652009     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)