Algorithm selection: A quantitative optimization-intensive approach

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 18, Issue 5, 1999, Pages 524-532

  Potkonjak, Miodrag ^a,b   Rabaey, Jan M ^a,b  

^a University of California   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; DEGREES OF FREEDOM (MECHANICS); OPTIMIZATION;

OPTIMIZATION-INTENSIVE APPROACH; SYSTEM LEVEL SYNTHESIS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0032631306     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.759065     Document Type: Article

References (31)

1. A.V. Aho, M. Ganapathi, and S.W.K. Tjiang, "Code generation using tree matching and dynamic programming," ACM Trans. Programming Languages and Systems, vol. 11, no. 4, pp. 491-516, 1989.
2. E. Avenhaus, "On the design of digital filters with coefficients of limited word length," IEEE Trans. Audio, Electroacoust, vol. 20, pp. 206-212, 1972.
3. R.E. Blahut, Fast Algorithms for Digital Signal Processing. Reading, MA: Addison-Wesley, 1985.
4. D.W. Brown and J.G. McWhirter, "The design of a block-regularized parameter estimator by algorithmic engineering," Int.J. Adaptive Contr. Signal Processing, vol. 11, no. 5, pp. 381-393, 1997.
5. P. Chan, "Algorithms for library-specific sizing of combinatorial logic," in Proc. Design Automation Conf., 1990, pp. 353-356.
6. T.H. Cormen, C.E. Leiserson, and R.L. Rivest, Introduction to Algorithms. Cambridge, MA: The MIT Press, 1990.
7. M.R. Corazao, M.A. Khalaf, L.M. Guerra, M. Potkonjak, et al., "Performance optimization using template mapping for datapath-intensive high-level synthesis," IEEE Trans. Computer-Aided Design of Integrated Circuits and Syst., vol. 15, pp. 877-888, Aug. 1996.
8. R.E. Crochiere and A.V. Oppenheim, "Analysis of linear networks," Proc. IEEE, vol. 63, pp. 581-595, Apr. 1975.
9. J. Darlington, "An experimental program transformation and synthesis system," Artif. Intell, vol. 16, no. 1, pp. 1-16, 1981.
10. E. Deprettere and A. Van der Veen, Eds. Algorithms and Parallel VLSI Architectures. Amsterdam, The Netherlands: Else vier, 1991.
11. N. Dershowitz, "Synthesis by completion," in Proc. The 9th Int. Joint Conf. Artificial Intelligence, 1985, pp. 208-214.
12. M.R. Garey and D.S. Johnson, Computers and Intractability: A Guide to the Theory of NP-Completeness. New York: Freeman, 1979.
13. C. Green, "Application of theorem proving to problem solving," in Proc. 1st Int. Joint Conf. Artificial Intelligence, 1969, pp. 219-239.
14. R.K. Gupta, C.N. Coehlo, and G. De Micheli, "Program implementation schemes for hardware-software system," IEEE Comput., Mag., vol. 27, no. 1, pp. 48-55, 1991.
15. A. Kalavade and E.A. Lee, "A hardware-software codesign methodology for DSP applications," IEEE Design & Test of Computers, Mag. vol. 10, no. 3, pp. 16-28, 1993.
16. K. Keutzer, "DAGON: Technology binding and local optimization by DAG matching," in Proc. Design Automation Conf, 1987, pp. 341-347.
17. D.E. Knuth, "Sorting and searching," The Art of Computer Programming, vol. 3. Reading, MA: Addison-Wesley, 1973.
18. H.W. Johnson and C.S. Burrus, "The design of optimal DFT algorithms using dynamic programming," IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-27, pp. 169-181, Feb. 1983.
19. E.L. Lawler, Combinatorial Optimization: Networks and Matroids. New York: Rinehart, 1976.
20. E.A. Lee and D.G. Messerschmitt, "Static scheduling of synchronous dataflow programs for digital signal processing," IEEE Trans. Comput., vol. C-36, pp. 24-35, Jan. 1987.
21. C.E. Leiserson, F.M. Rose, and J.B. Saxe, "Optimizing synchronous circuits by retiming," in Proc. 3rd Conf. VLSI., 1983, pp. 23-36.
22. W.-N. Li, A. Lim, P. Agarwal, and S. Sahni, "On the circuit implementation problem," IEEE Trans. Computer-Aided Design vol. 12, pp. 1147-1156, Aug. 1993.
23. A.V. Oppenheim and S.H. Nawab, Eds., Symbolic and KnowledgeBased Signal Processing. Englewood Cliffs, NJ, Prentice-Hall, 1992.
24. M. Potkonjak and J. Rabaey, "Pipelining: Just another transformation," in Proc. IEEE ASAP'92, 1992, pp. 163-175.
25. J. Rabaey, C. Chu, P. Hoang, and M. Potkonjak, "Fast prototyping of datapath-intensive architectures," IEEE Design and Test of Computers, Mag. vol. 8, no. 2, pp. 40-51, June 1991.
26. J.M. Rabaey and M. Potkonjak, "Estimating implementation bounds for real time DSP application specific circuits," IEEE Trans. ComputerAided Design vol. 13, pp. 669-683, June 1994.
27. D.E. Setliff and R.A. Rutenbar, "On the feasibility of synthesizing CAD software from specifications: Generating maze router tools in ELF," IEEE Trans. IEEE Trans. Computer-Aided Design, vol. 10, pp. 783-801, June 1991.
28. T.E. Smith and D.E. Setliff, "Toward an automatic synthesis system for real-time software," in Proc. 12th Real-Time Systems Symp., (Cat. no. 91CH3090-8), San Antonio, TX, 1991, p. 34-2.
29. J.D. Ullman, Database and Knowledge-Base Systems, Volume II: The New Technologies. Rockville, MD: Comput. Sei., 1989.
30. D.S. Wile, "Program developments: Formal explanations of implementations," Commun. ACM, vol. 26, no. 11, pp. 902-911, 1983.
31. W.H. Wolf, "Hardware-software co-design of embedded systems," Proc. IEEE, vol. 82, pp. 967-989, July 1994.