A Hardware-Software Codesign Methodology for DSP Applications

IEEE Design and Test of Computers

Volumn 10, Issue 3, 1993, Pages 16-28

  Kalavade, Asawaree ^a   Lee, Edward A ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 0001858874     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.232469     Document Type: Article

References (18)

1. R. Camposano, “From Behavior to Structure: High-Level Synthesis,” IEEE Design & Test of Computers, Vol. 7, No. 5, Oct. 1990, pp. 819.
2. J. Bier, P. Lapsley, and E.A. Lee, “Tools and Methodologies For the Design of DSP Systems,” tech, report, Berkeley Design Technology, Inc., 38842 Helen Way, Fremont, CA 94536, 1993.
3. G. Goosens et al., “Integration of Medium-Throughput Signal Processing Algorithms on Flexible Instruction-Set Architectures,” to be published in J. VLSI Signal Processing, special issue on Synthesis for DSP, 1993.
4. L. Mary, “DSP Based Technology for European Mobile Radio,” Signal Processing V: Theory and Applications, Proc. EUSIPCO-90, Elsevier, Amsterdam, 1990, pp. 1495–1498.
5. Y.S. Wu and LJ. Wu, “An Architectural Framework for Signal Flow,” Proc. Int'l Conf. Digital Signal Processing, North-Holland, Amsterdam, 1984, pp. 222–227.
6. J. Buck et al., “Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems,” to be published in Int'l J. Computer Simulation, special issue on Simulation Software Development, Jan. 1994.
7. J. Pino et al., “Software Synthesis for DSP Using Ptolemy,” to be published in J. VLSI Signal Processing, special issue on Synthesis for DSP, 1993.
8. A. Kalavade, Hardware/Software Codesign Using Ptolemy: A Case Study, master’s report, EECS Dept., Univ. of California, Berkeley, Dec. 1991.
9. J.T. Buck, The Ptolemy Kernel, Memorandum UCB/ERL M93/8, Univ. of California, Berkeley, Jan. 1993.
10. J. Rasure and C. Williams, “An Integrated Visual Language and Software Development Environment,” J. Visual Languages and Computing, Vol. 2, No. 3, Sept. 1991, pp. 217–246.
11. E.A. Lee and D.G. Messerschmitt, “Synchronous Data Flow,” Proc. IEEE, Vol. 75, No. 9, 1987, pp. 35–45.
12. Thor Tutorial, VLSI/CAD Group, Stanford Univ., Stanford, Calif., 1986.
13. A. Kalavade and E.A. Lee, “Hardware/ Software Codesign Using Ptolemy: A Case Study,” to be published in Proc. First IFIP Int'l Workshop Hardware/Software Codesign, IEEE Press, 1993.
14. J. Bier and E.A. Lee, “Frigg: A Simulation Environment for Multiprocessor DSP System Development,” Proc. Int'l Conf Computer Design, IEEE Computer Society Press, Los Alamitos, Calif., 1989, pp. 280–283.
15. G.C. Sih, Multiprocessor Scheduling to Account for Interprocessor Communication, PhD thesis, Electronic Research Laboratory, Univ. of California, Berkeley, Apr. 1991.
16. P. Hilfinger, “A High-Level Language and Silicon Compiler for Digital Signal Processing,” Proc. Custom Integrated Circuits Conf., IEEE Computer Society Press, Los Alamitos, Calif., 1985, pp. 213–216.
17. J. Rabaey et al., “Fast Prototyping of Datapath-Intensive Architectures,” IEEE Design & Test of Computers, Vol. 8, No. 2, June 1991, pp. 40–51.
18. E.A. Lee and D.G. Messerschmitt, Digital Communications, Kluwer Academic, Boston, pp. 128–135.