An integrated logical and physical design flow for deep submicron circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 18, Issue 9, 1999, Pages 1305-1315

  Salek, Amir H ^a   Lou, Jinan ^a   Pedram, Massoud ^a  

^a University of Southern California ^*  (United States)

Author keywords

Deep submicron design; Design flow; Dynamic programming; Placement; Synthesis

Indexed keywords

ALGORITHMS; DYNAMIC PROGRAMMING; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS;

DEEP-SUBMICRON LOGIC CIRCUITS; DYNAMIC PROGRAMMING-BASED ALGORITHMS;

VLSI CIRCUITS;

EID: 0032595827     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.784122     Document Type: Article

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