Supplementary condition for STG-designed speed-independent circuits

Electronics Letters

Volumn 34, Issue 7, 1998, Pages 620-622

  Piguet, C ^a  

^a CSEM   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

DELAY CIRCUITS; ELECTRIC INVERTERS;

SPEED INDEPENDENT CIRCUITS; STATE TRANSITION GRAPH;

CMOS INTEGRATED CIRCUITS;

EID: 0032473658     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19980458     Document Type: Article

References (9)

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2. LAVAGNO, L., et al.: 'Algorithms for synthesis and testing of asynchronous circuits' (Kluwer Academic Publishers, 1993)
3. KONDRATYEV, A.: 'Basic gate implementation of speed-independent circuits'. 31st Design Automation Conf. DAC, 1994, pp. 56-62
4. PIGUET, C.: 'Logic synthesis of race-free asynchronous CMOS circuits', IEEE J. Solid-State Circuits, 1991, JSSC-26, (3), pp. 371-380
5. PIGUET, C.: 'Synthesis of asynchronous CMOS circuits with negative gates', J. Solid-State Devices Circuits, 1997, 5, (2), pp. 12-20 (Brazil. Microelectron. Soc.)
6. PIGUET, C., and VON KAENEL, V.: 'Logic synthesis of a PLL phase frequency detector', IEE Proc. Comput. Digit. Tech., 1997, 144, (6), pp. 381-385
7. PIGUET, C.: 'Low-power low-voltage digital CMOS cell design'. PATMOS'94, Barcelona, Spain, 17-19 October 1994, pp. 132-139
8. YUAN, J., and SVENSSON, C.: 'High-speed CMOS circuit technique', IEEE J. Solid-State Circuits, 1989, JSSC-24, pp. 62-70
9. VITTOZ, E., DIJKSTRA, E., and SHIELS, D. (Eds): 'Low power design: a collection of CSEM papers' (Electronic Design Books, Penton Publishing, 1995)