Recent progress with vertical transistors

European Solid-State Device Research Conference

Volumn , Issue , 1997, Pages 34-41

  Risch, Lothar ^a   Aeugle, Thomas ^a   Rosner, Wolfgang ^a  

^a SIEMENS AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL LENGTH; DOPING CONCENTRATION; DOPING PROFILES; ELECTRICAL CHARACTERISTIC; HIGH SATURATION CURRENT; RECENT PROGRESS; SHORT CHANNELS; VERTICAL TRANSISTORS;

EID: 67349228275     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.1997.194377     Document Type: Conference Paper

References (9)

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3. W. Richardson et al., "A trench transistor cross point cell, " Technical Digest, IEDM, pp.714-717, 1985
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5. H. Pein and lPlummer, " Performance of the 3-D PENCIL Flash EPROM Cell and Memory array, " IEEE-TED, Vo1.42, No.11, pp.1982-1991, 1995
6. H.I. Hanaf et al., "A Scalable Low Power Vertical Memory, "Technical Digest, IEDM, pp.657-660, 1995
7. D. Behamer et al., " Selectively Grown Short Channel Vertical Si-p-MOS Transistor For Future Three Dimensional Self Aligned Integration, " ESSDERC Proceedings, pp.943-946, 1996
8. Th. Aeugle et al., "Advanced Self Aligned SOl Concepts For Vertical MOS Transistors With Ultrashort Channel Lengths, " ESSDERC 97, Proceedings
9. E. Bertagnolli et al., "ROS: An Extremely High Density Mask ROM Technology Based On Vertical Transistors, " 1996 Symp. VLSI Technology, Technical Digest, pp.58-59