Compression flow modeling of underfill encapsulants for low cost flip chip assembly

Proceedings - 4th International Symposium on Advanced Packaging Materials: Processes, Properties and Interfaces

Volumn 1998-March, Issue , 1998, Pages 33-40

  Pascarella, Nathan W ^a   Baldwin, Daniel F ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COST REDUCTION; FLIP CHIP DEVICES; INTERFACES (MATERIALS); PACKAGING MATERIALS; RESIN TRANSFER MOLDING; COMPRESSIBLE FLOW; COMPUTER SIMULATION; ENCAPSULATION; PLASTICS FILLERS; PROCESS CONTROL; VISCOSITY;

DEPOSITION GEOMETRY; FLIP CHIP ASSEMBLIES; PROCESS PARAMETERS; SIMULATION METHODOLOGY; SIMULATION STUDIES; SOLDER INTERCONNECT; UNDERFILL ENCAPSULANTS; UNDERFILL MATERIALS;

CHIP SCALE PACKAGES; ELECTRONICS PACKAGING;

UNDERFILL ENCAPSULANTS; VOID FORMATION;

EID: 0032231064     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISAPM.1998.664430     Document Type: Conference Paper

References (6)

1. Baldwin, D. F. and Pascarella, N. W., "Manufacturability of Underfill Processing for Low Cost Flip Chip," Structural Analysis in Microelectronics and Fiber Optics, ASME, EEP-Vol. 21, pp. 21-31,1997.
2. Han, S., Wang, K., and Cho, S., "Experimental and Analytical Study on the Flow of Encapsulant During Underfill Encapsulation of Flip-Chips", Proc 46th Electronic Components and Technology Conf., Orlando, FL, May 1996, pp. 327-334.
3. Pascarella, N. and Baldwin, D., "Advanced Encapsulation Processing for Low Cost Electronics Assembly - A Cost Analysis", 3rd International Symposium and Exhibition on Advanced Packaging Materials, Processes, Properties, and Intefaces, Braselton, GA, March 1997, pp. 50-53.
4. Pascarella, N. and Baldwin, D., "Advanced Encapsulation Processing for Low Cost Electronics Assembly - A Cost Analysis", Advances in Electronic Packaging-ASME INTERpack '97, Vol. 19-1, June 1997, pp. 359-363.
5. Pascarella, N.W., Advanced Encapsulation Processing for Low Cost Electronics Assembly, Master's Thesis, Georgia Institute of Technology, September, 1997.
6. McGovem, L. P. and Baldwin, D. F., "Initial Development Work on a High Throughput Low Cost Flip Chip on Board Assembly Process," Proceedings of the 30th International Symposium on Microelectronics, Philadelphia, PA, Oct., pp. 284-289, 1997.