A Low-voltage design technique for rf integrated circuits

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 45, Issue 10, 1998, Pages 1408-1413

  Manku, Tajinder ^a,b   Beck, Galen ^a,b   Shin, Etty J ^a,b  

^a IEEE   (Canada)

^b UNIVERSITY OF WATERLOO   (Canada)

Author keywords

Analog IC design; Low voltage; Radio frequency IC's

Indexed keywords

AMPLIFIERS (ELECTRONIC); INTEGRATED CIRCUIT LAYOUT; SPURIOUS SIGNAL NOISE;

NOISE FIGURE; RADIO-FREQUENCY (RF) INTEGRATED CIRCUITS;

LINEAR INTEGRATED CIRCUITS;

EID: 0032183262     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.728853     Document Type: Article

References (12)

1. A. N. Karanicolas, "A 2.7 V 900 MHz LNA and mixer," in Proc. IEEE Int. Solid-State Circuits Conf, 1996.
2. A. Rofougaran, J. Y. C. Chang, M. Rofougaran, and A. A. Abidi, "A 1 GHz CMOS RF front-end IC for a direct-conversion wireless receiver," IEEE J. Solid-State Circuits, vol. 31, no. 7, pp. 880-889, 1996.
3. J. C. Rudell et al., "A 1.9 GHz wide-band IF double conversion CMOS receiver for cordless telephone applications," IEEE J. Solid-State Circuits, vol. 32, pp. 2071-2088, 1997.
4. T. Manku, "Microwave CMOS - Devices and circuits," in Custom Integrated Circuits Conf., Santa Clara, CA, 1998, pp. 59-66.
5. D. K. Shaeffer and T. H. Lee, "A 1.5 V, 1.5 GHz CMOS low noise amplifier," IEEE J. Solid-State Circuits, vol. 32, pp. 745-759, May 1997.
6. P. J. Sullivan, B. A. Xavier, and W. H. Ku, "Low voltage performance of a microwave CMOS Gilbert cell mixer," IEEE J. Solid-State Circuits, vol. 32, pp. 1151-1155, July 1997.
7. B. Razavi, "A 1.5 V 900 MHz downconversion mixer," in Proc. IEEE Int. Solid State Circuits, 1996, pp. 48-49.
8. _, "Design considerations for direct-conversion receivers," IEEE Trans. Circuits Syst. II, vol. 44, pp. 428-435, 1997.
9. J. R. Long and M. A. Copeland, "A 1.9 GHz low voltage silicon bipolar receiver front-dent for wireless personal communications systems," IEEE J. Solid-State Circuits, vol. 30, pp. 1438-1448, 1996.
10. B. Razavi, Y. Ota, and R. G. Swartz, "Design techniques for low-voltage high speed digital bipolar circuits," IEEE J. Solid-State Circuits, vol. 29, 1994.
11. S. P. Voinigesu et al., "A scalable high-frequency noise model for bipolar transistors with applications to optimal transistor sizing for low-noise amplifier design," IEEE J. Solid-State Circuits, vol. 32, pp. 1430-1439, 1997.
12. A. Valkodai and T. Manku, "Modeling and design silicon thin-film inductors and transformers using HSPICE for RFIC applications," Integration, VLSI J., vol. 24, pp. 159-171, 1998.