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1
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85027098217
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Resistive single flux quantum logic for the Josephsonjunction technology
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K. K. Likharev, O. Mukhanov, and V. K. Semenov, "Resistive single flux quantum logic for the Josephsonjunction technology," SQUID'85, Berlin Germany, W. de Gruyter, pp. 1103-1108, 1985.
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SQUID'85, Berlin Germany, W. De Gruyter, Pp. 1103-1108, 1985.
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Likharev, K.K.1
Mukhanov, O.2
Semenov, V.K.3
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2
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77957748562
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Ultimate performance of RSFQ logic circuits
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K. K. Likharev, O. Mukhanov, and V. K. Semenov, "Ultimate performance of RSFQ logic circuits," IEEE Trans. Magnetics, vol. MAG-23, pp. 759-762, 1987.
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IEEE Trans. Magnetics, Vol. MAG-23, Pp. 759-762, 1987.
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Likharev, K.K.1
Mukhanov, O.2
Semenov, V.K.3
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3
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0026116572
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RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock frequency digital systems
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K. K. Likharev and V. K. Semenov, "RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock frequency digital systems," IEEE Trans. Appl. Superconductivity, vol. 1, pp. 1-28, 1991.
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IEEE Trans. Appl. Superconductivity, Vol. 1, Pp. 1-28, 1991.
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Likharev, K.K.1
Semenov, V.K.2
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4
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0030192780
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Error rate of a superconducting circuit, Appl. Phys. Lett., vol. 69, pp. 694-695, 1996.
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Q. P. Herr and M. J. Feldman, "Error rate of a superconducting circuit, " Appl. Phys. Lett., vol. 69, pp. 694-695, 1996.
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Herr, Q.P.1
Feldman, M.J.2
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5
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0029321850
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A clock distribution scheme for large RSFQ circuits
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K. Gaj, E. G. Friedman, M. J. Feldman, and A. Krasniewski, "A clock distribution scheme for large RSFQ circuits," IEEE Trans. Appl. Superconductivity, vol. 5, pp. 3320-3324, 1995.
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IEEE Trans. Appl. Superconductivity, Vol. 5, Pp. 3320-3324, 1995.
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Gaj, K.1
Friedman, E.G.2
Feldman, M.J.3
Krasniewski, A.4
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6
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85027200465
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Datadriven self-timing of RSFQ digital integrated circuits
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Z. J. Deng, S. R. Whiteley, and T. Van Duzer, "Datadriven self-timing of RSFQ digital integrated circuits," Extended Abstracts of 5th International Superconductive Electronics Conference, Naeoya, Japan, pp. 189-191, 1995.
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Extended Abstracts of 5th International Superconductive Electronics Conference, Naeoya, Japan, Pp. 189-191, 1995.
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Deng, Z.J.1
Whiteley, S.R.2
Van Duzer, T.3
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7
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0031162390
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Data-driven self-timed RSFQ digital integrated circuit and system
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Z. J. Deng, N. Yoshikawa, S. R. Whiteley, and T. Van Duzer, "Data-driven self-timed RSFQ digital integrated circuit and system," IEEE Trans. Applied Superconductivity, vol. 7, pp. 3634-3637, 1997.
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IEEE Trans. Applied Superconductivity, Vol. 7, Pp. 3634-3637, 1997.
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Deng, Z.J.1
Yoshikawa, N.2
Whiteley, S.R.3
Van Duzer, T.4
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8
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85027150932
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Design and testing of data-driven self-timed RSFQ shift register
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N. Yoshikawa, Z. J. Deng, S. R. Whiteley, and T. Van Duzer, "Design and testing of data-driven self-timed RSFQ shift register," Extended Abstract of International Superconductive Electronics Conference (ISEC'97), Berlin, Germany, June, pp. 382-384, 1997.
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Extended Abstract of International Superconductive Electronics Conference (ISEC'97), Berlin, Germany, June, Pp. 382-384, 1997.
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Yoshikawa, N.1
Deng, Z.J.2
Whiteley, S.R.3
Van Duzer, T.4
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9
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85027197805
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Design and testing of data-driven self-timed RSFQ demultiplexer
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N. Yoshikawa, Z. J. Deng, S. R. Whiteley, and T. Van Duzer, "Design and testing of data-driven self-timed RSFQ demultiplexer," Extended Abstract of International Superconductive Electronics Conference (ISEC'97), Berlin, Germany, June, pp. 353-355, 1997.
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Extended Abstract of International Superconductive Electronics Conference (ISEC'97), Berlin, Germany, June, Pp. 353-355, 1997.
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Yoshikawa, N.1
Deng, Z.J.2
Whiteley, S.R.3
Van Duzer, T.4
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10
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0031073738
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20 Gb/s self-timed vector processing with josephson single flux quantum technology
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Z. J. Deng, N. Yoshikawa, U. Ghoshal, S. R. Whiteley, and T. Van Duzer, "20 Gb/s self-timed vector processing with josephson single flux quantum technology," Technical Digest, 1997 International Solid-State Circuit Conference (ISSCC'97), San Francisco, pp. 128-129, Feb. 1997.
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Technical Digest, 1997 International Solid-State Circuit Conference (ISSCC'97), San Francisco, Pp. 128-129, Feb. 1997.
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Deng, Z.J.1
Yoshikawa, N.2
Ghoshal, U.3
Whiteley, S.R.4
Van Duzer, T.5
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11
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0031375214
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Data-Driven self-timed RSFQ high-speed test system
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Z. J. Deng, N. Yoshikawa, S. R. Whiteley, and T. Van Duzer, "Data-Driven self-timed RSFQ high-speed test system," IEEE Trans. Appl. Superconductivity, vol. 7, pp. 3830-3833, Dec. 1997.
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IEEE Trans. Appl. Superconductivity, Vol. 7, Pp. 3830-3833, Dec. 1997.
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Deng, Z.J.1
Yoshikawa, N.2
Whiteley, S.R.3
Van Duzer, T.4
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12
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0031166097
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Rapid single-flux-quantumdual-rail logic for asynchronous circuits
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M. Maezawa, I. Kurosawa, M. Aoyagi, H. Nakagawa, Y. Kameda, and T. Nanya, "Rapid single-flux-quantumdual-rail logic for asynchronous circuits," IEEE Trans. Appl. Superconductivity, vol. 7, pp. 3634-3637, 1997.
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IEEE Trans. Appl. Superconductivity, Vol. 7, Pp. 3634-3637, 1997.
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Maezawa, M.1
Kurosawa, I.2
Aoyagi, M.3
Nakagawa, H.4
Kameda, Y.5
Nanya, T.6
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13
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0030673529
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Delay insensitive logic for RSFQ superconductor technology
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P. Patra, D. S. Fussel, and S. Polonsky, "Delay insensitive logic for RSFQ superconductor technology," Proc. International Symposium on Advanced Research in Asynchronous Circuits and System, IEEE Computer Society Press, 1997.
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Proc. International Symposium on Advanced Research in Asynchronous Circuits and System, IEEE Computer Society Press, 1997.
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Patra, P.1
Fussel, D.S.2
Polonsky, S.3
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14
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0031170515
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The timing issue in the RSFQ logic is considered more generally in the following paper: K. Gaj, E. G. Friedman, and M. J. Feldman, Timing of multi-gigahertz rapid single flux quantum digital circuits
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The timing issue in the RSFQ logic is considered more generally in the following paper: K. Gaj, E. G. Friedman, and M. J. Feldman, "Timing of multi-gigahertz rapid single flux quantum digital circuits," Journal of VLSI Signal Processing, vol. 16, pp. 247-276, 1997.
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Journal of VLSI Signal Processing, Vol. 16, Pp. 247-276, 1997.
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15
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0026381436
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Margin and yield in single flux quantum logic
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C. A. Hamilton and K. C. Gilbert, "Margin and yield in single flux quantum logic," IEEE Trans. Appl. Superconductivity, vol. I, pp. 157-163, 1991.
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IEEE Trans. Appl. Superconductivity, Vol. I, Pp. 157-163, 1991.
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Hamilton, C.A.1
Gilbert, K.C.2
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16
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85027113720
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MJSIM is available on the Web (http://ww\v.yoshilab. dnj.ynu.ac.jp).
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17
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85027136233
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A Josephson integrated circuit simulator (JSIM) for superconductive electronics application
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E. S. Fang and T. Van Duzer, "A Josephson integrated circuit simulator (JSIM) for superconductive electronics application," Extended Abstracts of ISEC'89, Tokyo, pp. 407-410, 1989.
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Extended Abstracts of ISEC'89, Tokyo, Pp. 407-410, 1989.
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Fang, E.S.1
Van Duzer, T.2
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