RSFQ Logic/Memory Family: A New Josephson-Junction Technology for Sub-Terahertz-Clock-Frequency Digital Systems

IEEE Transactions on Applied Superconductivity

Volumn 1, Issue 1, 1991, Pages 3-28

  Likharev, K K ^a   Semenov, V K ^a  

^a MOSCOW STATE UNIVERSITY   (Russian Federation)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTERS, DIGITAL--MULTIPLYING CIRCUITS; ELECTRONIC CIRCUITS, FLIP FLOP; INTEGRATED CIRCUITS; LOGIC CIRCUITS;

ADDERS; DIVIDERS; JOSEPHSON LOGIC; RAPID SINGLE FLUX QUANTUM CIRCUITS; ULTRAFAST LOGIC;

SUPERCONDUCTING DEVICES;

EID: 0026116572     PISSN: 10518223     EISSN: 15582515     Source Type: Journal    
DOI: 10.1109/77.80745     Document Type: Article

References (77)

1. T. Van Duzer and C. W. Turner, Principles of Superconducting Circuits. New York: Elsevier, 1981.
2. R. L. Kautz, “Miniaturization of normal-state and superconducting microstriplines,” J. Res. NBS, vol. 84, pp. 247–259, Feb. 1979.
3. S. Kotani, T. Imamura, and S. Hasuo, “A 1.5-ps Josephson or gate,” Tech. Digest IEDM ’88, pp. 884–885, 1988.
4. “Josephson computer technology: An IBM research project,” IBM J. Res. Develop., vol. 24, Mar. 1980.
5. M. B. Ketchen et al., “A Josephson technology system level experiment,” IEEE Electron Device Lett., vol. EDL-2, pp. 262–265, Feb. 1981.
6. H. Hayakawa, “Josephson junction technology for high speed computer systems,” IEEE Trans. Magnetics, vol. MAG-19, pp. 845–852, Mar. 1983.
7. T. Gheewala, “The Josephson technology,” Proc. IEEE, vol. 70, pp. 26–34, Jan. 1982.
8. T. Ryhaenen et al., “SQUID magnetometers for low frequency applications,” J. Low Temp. Phys., vol. 76, pp. 287-386, June 1989.
9. G. K. G. Hohenwarter, J. A. Grange, and S. R. Whiteley, “A fast open-cycle cryocooler for cryogenic high-speed signal processing circuits,” IEEE Trans. Magnetics, vol. MAG-23, pp. 775–776, Mar. 1987.
10. C. Seitz, “System timing,” in C. Mead and L. Conway, Introduction to VLSI Systems. Reading, MA: Addison-Wesley, 1980, ch. 7.
11. K. K. Likharev, Dynamics of Josephson Junctions and Circuits. New York: Gordon and Breach, 1986.
12. P. C. Arnett and D. J. Herrell, “Power design for gigabit Josephson logic systems,” IEEE Trans. Microwave Theory Tech., vol. MTT-28, pp. 500–508, Oct. 1980.
13. T. Enoki, S. Sugitani, and Y. Yamane, “0.15 μm GaAs MESFETs applied to ultrahigh-speed frequency divider,” Electron. Lett., vol. 25, pp. 512–513, Apr. 1989; L. Waller, “Hughes breaks speed record for digital gallium arsenide,” Electronics, pp. 31–31, Dec. 1986.
14. H. Kroger, “Josephson devices and technology,” in Japanese Assessment. Park Ridge, NJ: Noyes Data Corporation, 1986, pp. 250–306.
15. Y. Tarutani, M. Hirado, and U. Kawabe, “Niobium-based integrated circuit technologies,” Proc. IEEE, vol. 77, pp. 1164–1176, Aug. 1989.
16. Yu Hatano, S. Yano, H. Mory, H. Yamada, M. Hirano, and U. Kavabe, “A 4-bit Josephson data processor with dc output buffer,” in Extended Abstracts of ISEC ’89, Tokyo, 1989, pp. 375–380.
17. S. Kotani, T. Imamura, and S. Hasuo, “A subnanosecond clock Josephson 4-bit processor,” IEEE J. Solid-State Circuits, vol. 25, pp. 117–124, Feb. 1990.
18. H. Nakagawa, S. Kosaka, I. Kurosawa, M. Aoyagi, Y. Hamazaki, Y. Okada, and S. Takada, “ A Josephson 4-bit processor for a prototype computer,” in Extended Abstracts of ISEC ’89, Tokyo, 1989, pp. 387–390.
19. S. Kotani, A. Inoue, T. Imamura, and S. Hasuo, ‘‘A 1-GOPS 8-bit Josephson digital signal processor,” presented at ISSCC ’90, San Francisco, CA, Feb. 1990.
20. I. Kurosawa, H. Nakagawa, S. Kosaka, M. Aoyagi, and S. Takada, ‘‘A 1-kbit variable threshold Josephson RAM chip,” in Extended Abstracts of ISEC ’89, Tokyo, 1989, pp. 395–400.
21. S. Nagasawa, Y. Wada, H. Tsuge, M. Hidaka, I. Ishida, and S. Tahada, ‘‘Subnanosecond Josephson high speed memory,” in Extended Abstracts of ISEC ’89, Tokyo, 1989, 401–406.
22. S. Hasuo and T. Imamura, ‘‘Digital logic circuits,” Proc. IEEE, vol. 77, pp. 1177–1193, Aug. 1989.
23. K. K. Likharev, O. A. Mukhanov, and V. K. Semenov, ‘‘Resistive single flux quantum logic for the Josephson-junction technology,” in SQUID ’85. Berlin, Germany: W. de Gruyter, 1985, pp. 1103–1108.
24. V. P. Koshelets, K. K. Likharev, V. V. Migulin, O. A. Mukhanov, G. A. Ovsyannikov, V. K. Semenov, I. L. Serpuchenko, and A. N. Vystavkin, ‘‘Experimental realization of a resistive single flux quantum logic circuit,” IEEE Trans. Magnetics, vol. MAG-23, pp. 755–758, March 1987.
25. K. K. Likharev, O. A. Mukhanov, and V. K. Semenov, ‘‘Ultimate performance of RSFQ logic circuits,” IEEE Trans. Magnetics, vol. 23, pp. 759–762, Mar. 1987.
26. V. K. Kaplunenko, M. I. Khabipov, V. P. Koshelets, K. K. Likharev, O. A. Mukhanov, V. K. Semenov, I. L. Serpuchenko, and A. N. Vystavkin, ‘‘Experimental study of the RSFQ logic elements,” IEEE Trans. Magnetics, vol. 25, pp. 861–864, Mar. 1989.
27. V. K. Kaplunenko, M. I. Khabipov, V. P. Koshelets, I. L. Serpuchenko, and A. N. Vystavkin, ‘‘Experimental study of the single flux quantum devices,” in Extended Abstracts ISEC ’89, Tokyo, 1989, pp. 411–414.
28. L. V. Fillipenko, V. K. Kaplunenko, M. I. Khabipov, V. P. Koshelets, K. K. Likharev, O. A. Mukhanov, S. V. Rylov, V. K. Semenov, and A. N. Vystavkin, “Experimental implementation of analog-to-digital converter based on the reversible ripple counter,” submitted to 1990 Applied Superconductivity Conf. Snowmass, CO, Sep. 1990.
29. O. A. Mukhanov, S. V. Rylov, V. K. Semenov, and S. V. Vyshenskii, “RSFQ logic arithmetic,” IEEE Trans. Magnetics, vol. 25, pp. 857–860, Mar. 1989.
30. “Recent development of rapid single flux quantum (RSFQ) logic ditical devices,” in Extended Abstracts ISEC ’89, Tokyo, 1989, 557–560.
31. K. K. Likharev, O. A. Mukhanov, and V. K. Semenov, “Quantum pulse reproduction in Josephson junction system,” Mikroelektronika (Soviet Microelectronics), vol. 17, pp. 155–161, Feb. 1988; pp. 147–154, Mar. 1988.
32. C. Mead and L. Conway, Introduction to VLSI Systems. Reading, MA: Addison-Wesley, 1980, ch. 6.
33. S. V. Rylov, “Analysis of high-performance counter-type A/D converters using RSFQ logic/memory elements,” Rep. PRP-1, 1990 Applied Superconductivity Conf., Snowmass, CO, Sept. 1990; IEEE Trans. Magnetics, to be published.
34. O. A. Mukhanov, S. V. Polonskii, and V. K. Semenov, “New elements of the RSFQ logic family,” Rep. PRP-2, 1990 Applied Superconductivity Conf., Snowmass, CO, Sept. 1990; IEEE Trans, on Magnetics., to be published.
35. S. Komori, H. Takata, T. Tamura, F. Asai, T. Ohno, O. Tomisawa, T. Yamasaki, K. Shima, K. Asada, and H. Terada, “Elastic pipeline mechanism by self-timed circuits,” IEEE J. Solid-State Circuits, vol. 23, pp. 111–117, Feb. 1988.
36. C. J. Anderson, M. Klein, and M. B. Ketchen, “Transmission of high speed electrical signals in a Josephson package,” IEEE Trans. Magnetics, vol. MAG-19, pp. 1182–1185, Mar. 1983.
37. V. K. Kornev and V. K. Semenov, “The Josephson Goto pair as a basic element of high sensitive samplers,” in Extended Abstracts ISEC ’87, Tokyo, 1987, pp. 131–134.
38. G. S. Lee and D. A. Peterson, “Superconductive A/D converters,” Proc. IEEE, vol. 77, pp. 1164–1176, Aug. 1989.
39. S. V. Rylov and V. K. Semenov, “A wide-margin Josephson-junction A/D converter using the redundant coding,” Electron. Lett., vol. 21, pp. 829–830, Sept. 1985.
40. J. P. Hurrell and A. H. Silver, “SQUID digital electronics,” in Future Trends in Superconductive Electronics, B. S. Deaver, Jr. et al., Eds. New York: AIP, Conf. Proc. #44, 1978, pp. 437–447.
41. J. P. Hurrell, D. C. Pridemore-Brown, and A. H. Silver, “A/D conversion with unlatched SQUID’s,” IEEE Trans. Electron Devices, vol. ED-27, 1887–1896, Oct. 1980.
42. VLSI and Modern Signal Processing, S. Y. Kung, H. J. Whitehouse, and T. Kailath, Eds. Englewood Cliffs, NJ: Prentice-Hall, 1985.
43. P. Denyer and D. Renshaw, VLSI Signal Processing: A Bit-Serial Approach. Wokingham: Addison-Wesley, 1985.
44. “Cellular-automata,” Proc. Interdisciplinary Workshop, Los Alamos, NM, Mar. 1983, Physica D, vol. 10D, Jan. 1984.
45. M. Gurwitch, M. A. Washington, and H. A. Huggins, “High refractory Josephson tunnel junctions utilizing thin aluminum layers,” Appl. Phys. Lett., vol. 42, pp. 472–475, Mar. 1983.
46. V. P. Koshelets, G. A. Ovsyannikov, I. L. Serpuchenko, and A. N. Vystavkin, “Frequency conversion with quasiparticle nonlinearity of Nb-A10 x -Nb tunnel junctions,” Pis'ma Zh. Tekhn. Fiz. (Soviet Tech. Phys. Lett.), vol. 11, pp. 290–295, Mar. 1985.
47. S. Nagasawa, H. Tsuge, and Y. Wada, “Planarization technology for Josephson integration circuits,” IEEE Electron Device Lett., vol. 25, pp. 414–416, Aug. 1989.
48. L. D. Jackel, E. L. Hu, R. E. Howard, L. A. Fetter, and D. M. Tennant, “Ultrasmall superconducting tunnel junctions,” IEEE Trans. Electron Devices, vol. ED-27, pp. 2030–2031, Oct. 1980.
49. T. Imamura, H. Hoko, and S. Hasuo, “Integration process for Josephson LSI based on Nb/Al203/Al junctions,” in Extended Abstracts ISEC ’87, 1987, 57–62.
50. P. W. Anderson, R. C. Dynes, and T. A. Fulton, “Josephson flux quantum shuttles,” Bull. Am. Phys. Soc., vol. 16, p. 399, Mar. 1971.
51. T. A. Fulton and L. N. Dunkleberger, “Experimental flux shuttle,” Appl. Phys. Lett., vol. 22, pp. 232–233, Jan. 1973.
52. T. D. Clark and J. P. Baldwin, “Superconducting memory device using Josephson junctions,” Electron. Lett., vol. 3, pp. 178–179, Feb. 1967.
53. W. Anacker and H. H. Zappe, “Superconducting memory array using weak links,” U.S. Patent 3 705 393, Dec. 5, 1972.
54. K. K. Likharev, “Properties of a weak-link-closed superconducting loop as a multi-state device,” Radiotekhnika i Elektronika, vol. 19, pp. 1494–1502, June 1974.
55. W. Y. Lum and T. Van Duzer, “Switching measurements on semiconductor-barrier Josephson junctions, isolated and in memory loops,” J. Appl. Phys., vol. 48, pp. 1693–1696, Apr. 1977.
56. W. J. Lum, H. W. K. Chan, and T. Van Duzer, “Memory and logic circuits using semiconductor-barrier Josephson junctions,” IEEE Trans. Magnetics, vol. MAG-13, pp. 48–51, Jan. 1977.
57. H. H. Zappe, “A subnanosecond Josephson tunneling memory cell with nondestructive readout,” IEEE J. Solid-State Circuits, vol. SSC-10, pp. 12–19, Feb. 1975.
58. ─ ─“A single flux quantum Josephson junction memory cell,” Appl. Phys. Lett., vol. 25, pp. 424–426, July 1974.
59. K. K. Likharev, “Dynamics of some single flux quantum devices, I—Parametric quantron,” IEEE Trans. Magnetics, vol. 13, pp. 242–244, Jan. 1977.
60. ─ ─, “Classical and quantum limitations on energy consumption in computation,” Int. J. Theor. Phys., vol. 21, pp. 311–326, July 1982.
61. K. Nakajima, G. Oya, and Y. Sawada, “Fluxoid motion in phase mode Josephson switching system,” IEEE Trans. Magnetics, vol. MAG-19, pp. 1201–1204, Mar. 1983.
62. Y. Okabe, A. Inoue, and T. Sugano, “Self-biasing logic-memory cell with wide margins,” in Proc. 17th Conf. Low Temp. Phys., U. Eckern et al., Eds. Amsterdam: Elsevier, 1974, pp. 445–446.
63. A. H. Silver, R. P. Phillips, and R. D. Sandell, “High speed nonlatching SQUID binary ripple counter,” IEEE Trans. Magnetics, vol. MAG-21, pp. 204–207, Jan. 1985.
64. K. F. Loe and E. Goto, “Analysis of flux input and output Josephson pair device,” IEEE Trans. Magnetics, vol. MAG-21, pp. 884–887, Mar. 1985.
65. K. K. Likharev, S. V. Rylov, and V. K. Semenov, “Reversible conveyor computation in array of parametric quantrons,” IEEE Trans. Magnetics, vol. MAG-21, pp. 947–950, Jan. 1985.
66. K. Nakajima, Y. Onodera, and Y. Ogawa, “Logic design of Josephson network,” J. Appl. Phys., vol. 47, pp. 1620–1627, Apr. 1976; vol. 49, pp. 2958–2963, May 1978.
67. C. A. Hamilton and F. L. Lloyd, “100 GHz binary counter based on dc SQUID’s,” IEEE Electron Device Lett., vol. 3, pp. 335–338, Nov. 1982.
68. G. Oya, M. Yamashita, and Y. Sawada, “Single flux quantum 4JL-interferometer operated in the phase mode,” IEEE Trans. Magnetics, vol. MAG-21, pp. 880–883, Mar. 1985.
69. K. Nakajima, H. Sugahara, A. Fujimaki, and Y. Sawada, “Experimental analysis of phase-mode Josephson digital circuits,” J. Appl. Phys., vol. 66, pp. 949–955, July 1989.
70. Superconducting Devices, S. T. Ruggiero and D. A. Rudman, Eds. Boston: Academic Press, 1990.
71. K. K. Likharev, “Progress and prospects of superconductor electronics,” Supercond. Sci. Tech., vol. 3, pp. 325–337, July 1990.
72. M. Yu Kupriyanov and K. K. Likharev, “Josephson effect in high-Tc superconductors and structures,” Usp. Fiz. Nauk, vol. 160, pp. 49–88, May 1990.
73. N. Fujimaki, H. Tamura, T. Imamura, and S. Hasuo, “Single-chip SQUID magnetometer,” IEEE Trans. Electron Devices, vol. 35, pp. 2412–2418, Dec. 1988.
74. C. G. Bell and A. Newel, Computer Structures: Reading and Examples. New York: McGraw-Hill, 1971.
75. R. W. Adams, “Design and implementation of an audio 18-bit analog-to-digital converter using oversampling techniques,” J. Audio Eng. Soc., vol. 34, pp. 153–166, Mar. 1986.
76. A. F. Hebard, S. S. Pei, L. N. Dunkleberger, and T. A. Fulton, “A dc-powered Josephson flip-flop,” IEEE Trans. Magnetics, vol. MAG-15, pp. 408–411, Jan. 1979.
77. N. Kotera, A. Asano, Y. Harada, and U. Kawabe, “Ring oscillator experiment using a huffle circuit,” IEEE Trans. Magnetics, vol. MAG-19, pp. 1174–1177, May 1983.