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Volumn 17, Issue 9, 1998, Pages 862-872

Probabilistic fault detection and the selection of measurements for analog integrated circuits

Author keywords

Analog test; Test generation

Indexed keywords

ELECTRIC FAULT CURRENTS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING;

EID: 0032165315     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.720321     Document Type: Article
Times cited : (29)

References (8)
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    • Milor, L.1    Visvanathan, V.2
  • 4
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    • "Faults detection and classificatio in linear integrated circuits: An application of discrimination analysi and hypothesis testing,"
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    • B. Epstein, M. Czigler, and S. Miller, "Faults detection and classificatio in linear integrated circuits: An application of discrimination analysi and hypothesis testing," IEEE Trans. Computer-Aided Design, vol. 12 no. 1, pp. 102-113, 1993.
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    • Milor, L.1    Sangiovanni-Vincentelli, A.2
  • 8
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    • "Testing of analog integrate circuits based on power-supply current monitoring and discriminatio analysis," in
    • 1994 pp. 495-498.
    • Z. Wang, G. Gielen, and W. Sansen, "Testing of analog integrate circuits based on power-supply current monitoring and discriminatio analysis," in Proc. Int. Conf. Computer-Aided Design (ICCAD), 1994 pp. 495-498.
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    • Wang, Z.1    Gielen, G.2    Sansen, W.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.