Fab layout design methodology: Case of the 300 mm fabs

Semiconductor International

Volumn 21, Issue 8, 1998, Pages 187-196

  Meyersdorf, Doron ^a,b   Taghizadeh, Abolfazl ^a  

^a Tefen USA ^*  (United Kingdom)

^b Tefen Ltd   (Israel)

Author keywords

[No Author keywords available]

Indexed keywords

CLEAN ROOMS; COST EFFECTIVENESS; EFFICIENCY; ERGONOMICS; INDUSTRIAL PLANTS; MATERIALS HANDLING; PLANNING; PLANT LAYOUT; PRODUCTIVITY;

FACILITY LAYOUT DESIGN; MACROANALYSIS; PRODUCT FLOW; SEMICONDUCTOR FAB;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 0032119904     PISSN: 01633767     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (4)

1. J.M. Padillo, D. Meyersdorf, O. Reshef, "Incorporating manufacturing objectives into the semiconductor facility layout design process: A methodology and selected cases," Proceedings of 1997 IEEE/SEMI Advanced Semiconductor Manufacturing Conference.
2. C. Haris, M. Hiatt, S. Mastroianni, K. Mautz, B. Pitts, "Fabrication of the first transistors on 300 mm wafers," Semiconductor International, August 1997.
3. D. Meyersdorf, "Making the move from 200 mm to 300 mm wafers in the semiconductor industry," TEFEN R&D working paper, July 1997.
4. M. Weiss, "300 mm Fab automation technology options and selection criteria," Proceedings of 1997 IEEE/SEMI Advanced Semiconductor Manufacturing Conference, Boston, September 1997.