A four-quadrant S2I switched-current multiplier

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 45, Issue 7, 1998, Pages 791-799

  Manganaro, Gabriele ^a,b   De Gyvez, Jose Pineda ^a,b  

^a TEXAS INSTRUMENTS   (United States)

^b Department of Electrical and Computer Engineering   (United States)

Author keywords

Analog multipliers; Nonlinear circuits; Sampled data circuits

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; ELECTRIC IMPEDANCE; ERROR COMPENSATION; FEEDBACK; HARMONIC ANALYSIS; MULTIPLYING CIRCUITS; NONLINEAR NETWORK ANALYSIS; NONLINEAR NETWORK SYNTHESIS; SIGNAL DISTORTION; SIGNAL TO NOISE RATIO;

SAMPLED DATA CIRCUITS; SWITCHED CURRENT TECHNIQUE;

SWITCHING NETWORKS;

EID: 0032119707     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.700926     Document Type: Article

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