A Class of Analog CMOS Circuits Based on the Square-Law Characteristic of an MOS Transistor in Saturation

IEEE Journal of Solid-State Circuits

Volumn 22, Issue 3, 1987, Pages 357-365

  Bult, Klaas ^a   Wallinga, Hans ^a  

^a UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CONTROL, ELECTRIC VARIABLES - VOLTAGE; ELECTRONIC CIRCUITS - REVIEWS; TRANSISTORS;

ANALOG COMPLEMENTARY MOS (CMOS) CIRCUITS; DIVIDER CIRCUIT; FLOATING INPUT LINEAR V-I CONVERTER; GATE-SOURCE VOLTAGES SUM AND DIFFERENCE CONTROL; LINEAR I-V CONVERTER (LIVC);

SEMICONDUCTOR DEVICES, MOS;

EID: 0022733061     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/JSSC.1987.1052733     Document Type: Article

References (4)

1. K. Bult and H. Wallinga, “A CMOS four-quadrant analog multiplier,” IEEE J. Solid-State Circuits, vol. SC-21, no. 3, pp. 430–435, June 1986.
2. J. N. Babanezhad and G. C. Temes, “A 20-V four-quadrant CMOS analog multiplier,” IEEE J. Solid-State Circuits, vol. SC-20, no. 6, pp. 1158–1168, Dec. 1985.
3. A. Nedungadi and T. R. Viswanathan, “Design of linear CMOS transconductance elements,” IEEE Trans. Circuits Syst., vol. CAS-31, no. 10, pp. 891–894, Oct. 1984.
4. A. Stolmeyer, “A twin-well CMOS process using high energy ion implantation,” IEEE Trans. Electron Devices, vol. ED-33, no. 4, pp. 450–457, Apr. 1986.