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Volumn 31, Issue 9, 1996, Pages 1340-1343

A 3.3 V 625 kHz switched-current multiplier

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POWER SUPPLIES TO APPARATUS; SWITCHING CIRCUITS;

EID: 0030242773     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.535421     Document Type: Article
Times cited : (17)

References (11)
  • 3
    • 0343142643 scopus 로고
    • Switched-currents an analogue technique for digital technology
    • London: Peregrinus
    • C. Toumazou, J. B. Hughes, and N. C. Battersby, "Switched-currents an analogue technique for digital technology," IEEE Circuits and Systems Series. London: Peregrinus, 1993, vol. 5.
    • (1993) IEEE Circuits and Systems Series , vol.5
    • Toumazou, C.1    Hughes, J.B.2    Battersby, N.C.3
  • 4
    • 0026206117 scopus 로고
    • Generalized translinear circuit principle
    • Aug.
    • E. Seevinck and R. J. Wiegerink, "Generalized translinear circuit principle," IEEE J. Solid-State Circuits, vol. 26, pp. 1098-1102, Aug. 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 1098-1102
    • Seevinck, E.1    Wiegerink, R.J.2
  • 7
    • 0025594254 scopus 로고
    • A new multiplier-divider circuit based on switched capacitor data converters
    • May
    • M. S. Piedade and A. Pinto, "A new multiplier-divider circuit based on switched capacitor data converters," in Proc. IEEE Int. Symp. Circuits and Systems, May 1990, pp. 2224-2227.
    • (1990) Proc. IEEE Int. Symp. Circuits and Systems , pp. 2224-2227
    • Piedade, M.S.1    Pinto, A.2
  • 9
    • 0029373159 scopus 로고
    • CMOS analog divider and four-quadrant multiplier using pool circuits
    • S. Liu and C. Chang, "CMOS analog divider and four-quadrant multiplier using pool circuits," IEEE J. Solid-Sate Circuits, vol. 30, no. 9, pp. 1025-1029, 1995.
    • (1995) IEEE J. Solid-Sate Circuits , vol.30 , Issue.9 , pp. 1025-1029
    • Liu, S.1    Chang, C.2
  • 10
    • 0022939656 scopus 로고
    • Analog CMOS computational circuits
    • Sept.
    • K. Bult and H. Wallinga, "Analog CMOS computational circuits," in Proc. ESSCIRC'86, Sept. 1986, pp. 119-121.
    • (1986) Proc. ESSCIRC'86 , pp. 119-121
    • Bult, K.1    Wallinga, H.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.