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Volumn 31, Issue 7, 1996, Pages 945-951

A full nyquist 15 MS/s 8-b differential switched-current A/D converter

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ANALOG TO DIGITAL CONVERSION; BANDWIDTH; CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; ELECTRIC NETWORK TOPOLOGY; INTEGRATED CIRCUIT MANUFACTURE; NYQUIST DIAGRAMS; OPTIMIZATION; PERFORMANCE; SWITCHING NETWORKS;

EID: 0030192217     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.508207     Document Type: Article
Times cited : (21)

References (13)
  • 2
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    • A switched-capacitor filter in 2 μm CMOS using parallelism to sample at 80 MHz
    • Feb.
    • S. K. Berg, P. J. Hurst, S. H. Lewis, and P. T. Wong, "A switched-capacitor filter in 2 μm CMOS using parallelism to sample at 80 MHz," presented at Proc. IEEE ISSCC, Feb. 1994.
    • (1994) Proc. IEEE ISSCC
    • Berg, S.K.1    Hurst, P.J.2    Lewis, S.H.3    Wong, P.T.4
  • 3
    • 0024917553 scopus 로고
    • Switched-currents - A new technique for analog sampled-data signal processing
    • May
    • J. B. Hughes, N. C. Bird, and I. C. Macbeth, "Switched-currents - A new technique for analog sampled-data signal processing," presented at Proc. IEEE ISCAS, May 1989.
    • (1989) Proc. IEEE ISCAS
    • Hughes, J.B.1    Bird, N.C.2    Macbeth, I.C.3
  • 4
    • 0027987527 scopus 로고
    • An 8 MHz, 80 MS/s switched-current filter
    • Feb.
    • J. B. Hughes and K. W. Moulding, "An 8 MHz, 80 MS/s switched-current filter," presented at Proc. IEEE ISSCC, Feb. 1994.
    • (1994) Proc. IEEE ISSCC
    • Hughes, J.B.1    Moulding, K.W.2
  • 5
    • 0023599417 scopus 로고    scopus 로고
    • A pipelined 5-Msample/s 9-bit analog-to-digital converter
    • Dec.
    • S. H. Lewis and P. R. Gray, "A pipelined 5-Msample/s 9-bit analog-to-digital converter," IEEE J. Solid-State Circuits, vol. SC-22, no. 6, Dec. 1987.
    • IEEE J. Solid-State Circuits , vol.SC-22 , Issue.6 , pp. 1987
    • Lewis, S.H.1    Gray, P.R.2
  • 6
    • 0026901915 scopus 로고    scopus 로고
    • Optimising the stage resolution in pipelined, multistage, analog-to-digital converters for video-rate applications
    • Aug.
    • S. H. Lewis, "Optimising the stage resolution in pipelined, multistage, analog-to-digital converters for video-rate applications," IEEE Trans. Circuits Syst. II, vol. 39, no. 8, Aug. 1992.
    • IEEE Trans. Circuits Syst. II , vol.39 , Issue.8 , pp. 1992
    • Lewis, S.H.1
  • 8
    • 0029304585 scopus 로고
    • A CMOS transistor-only 8-b 4.5 MS/s pipelined analog-to-digital converter using fully-differential current-mode circuit techniques
    • May
    • C.-Y. Wu, C.-C. Chen, and J.-J. Cho, "A CMOS transistor-only 8-b 4.5 MS/s pipelined analog-to-digital converter using fully-differential current-mode circuit techniques," IEEE J. Solid-State Circuits, vol. 30, no. 5, pp. 522-532, May 1995.
    • (1995) IEEE J. Solid-State Circuits , vol.30 , Issue.5 , pp. 522-532
    • Wu, C.-Y.1    Chen, C.-C.2    Cho, J.-J.3
  • 9
    • 0003426347 scopus 로고
    • VSwitched-current limitations and nonideal behavior
    • T. Hughes and Battersby, Eds. London U.K.: IEE Press
    • J. B. Hughes and W. Redman-White, "Switched-current limitations and nonideal behavior" in Switched Current Techniques, T. Hughes and Battersby, Eds. London U.K.: IEE Press, 1993, pp. 71-135.
    • (1993) Switched Current Techniques , pp. 71-135
    • Hughes, J.B.1    Redman-White, W.2
  • 10
  • 12
    • 2442505258 scopus 로고
    • An integrated design and synthesis system for high performance switched-current analogue filters
    • Lille, France, Sept.
    • J. Richardson et al., "An integrated design and synthesis system for high performance switched-current analogue filters," in Proc. European Solid-State Circuits Conf., Lille, France, Sept. 1995.
    • (1995) Proc. European Solid-State Circuits Conf.
    • Richardson, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.