High-speed and low-cost reverse converters for the (2n - 1, 2n, 2n + 1) moduli set

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 45, Issue 7, 1998, Pages 903-908

  Benjamin Premkumar, A ^a   Bhardwaj, M ^a   Srikanthan, T ^b  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b Siemens Components   (Singapore)

Author keywords

Modular arithmetic; Residue numbers; Reverse converters

Indexed keywords

ADDERS; ALGORITHMS; BINARY SEQUENCES; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; DIGITAL ARITHMETIC; MULTIPLYING CIRCUITS; NUMBER THEORY;

RESIDUE NUMBERS; REVERSE CONVERTERS;

CODE CONVERTERS;

EID: 0032117670     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.700943     Document Type: Article

References (8)

1. A. B. Premkumar," An RNS to binary converter in 2n + 1, 2n, 2n - 1 moduli set," IEEE Trans. Circuits Syst. II, vol. 39, pp. 480-482, July 1992.
2. K. M. Ibrahim and S. N. Saloum," An efficient residue to binary converter design," IEEE Trans. Circuits Syst., vol. 35, pp. 1156-1158, Sept. 1988.
3. S. Andraos and H. Ahmad," A new efficient memoryless residue to binary converter," IEEE Trans. Circuits Syst., vol. 35, pp. 1441-1444, Nov. 1988.
4. P. Bernardson," Fast memoryless over 64 bits, residue to binary converter," IEEE Trans. Circuits Syst., vol. CAS-32, pp. 298-300, Mar. 1985.
5. B. Guan and E. V. Jones," Fast conversion between binary and residue numbers," Electron. Lett., vol. 24, no. 19, pp. 1195-1197, Sept. 1988.
6. B. Vinnakota and V. V. B. Rao," Fast conversion techniques for binary to RNS," IEEE Trans. Circuits Syst. I, vol. 41, pp. 927-929, Dec. 1994.
7. S. J. Piestrak," A high speed realization of residue to binary number system conversion," IEEE Trans. Circuits Syst. II, vol. 41, pp. 661-663, Dec. 1995.
8. N. S. Szabo and R. I. Tanaka, Residue Arithmetic and its Applications to Computer Technology. New York: McGraw-Hill, 1967.