Fast Memoryless, Over 64 Bits, Residue-To-Binary Convertor

IEEE Transactions on Circuits and Systems

Volumn 32, Issue 3, 1985, Pages 298-300

  Bernardson, P ^a  

^a Commodore International Ltd ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTERS - ADDERS;

RESIDUE-TO-BINARY CONVERTOR;

COMPUTERS, DIGITAL;

EID: 0022025270     PISSN: 00984094     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCS.1985.1085689     Document Type: Article

References (6)

1. N. S. Szabó and R. I. Tanaka, Residue Arithmetic and Its Application to Computer Technology. New York: McGraw-Hill, 1967.
2. F. J. Taylor and A. S. Ramnarayanan, “An efficient residue to decimal convertor,” IEEE Trans. Circuits Syst., vol. CAS-28, pp. 1164–1169, Dec. 1981.
3. G. A. Jullien, “Residue number scaling and other operations using ROM arrays,” IEEE Trans. Comput., vol. C-27, pp. 325–337, Apr. 1978.
4. W. K. Jenkins, “A new algorithm for scaling in residue number systems with applications to recursive digital filtering,” in Proc. IEEE Int. Symp. on Circuits and Systems, (Phoenix, AZ), pp. 56–59, 1977.
5. H. Nussabaumer, “Digital filters using ready-only memories,” Electron. Lett., vol. 11, pp. 294–295, 1976.
6. M. A. Soderstrand, C. Vernia, and J. H. Chang, “An improved residue number system digital to analog convertor,” • IEEE Trans. Circuits Syst., vol. CAS-30, pp. 903–907, Dec. 1983.