RNS-to-binary conversion for efficient vlsi implementation

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 45, Issue 6, 1998, Pages 667-669

  Cardarilli, G C ^a   Re, M ^a   Lojacono, R ^a  

^a UNIVERSITY OF ROME TOR VERGATA   (Italy)

Author keywords

Parallel processing; Residue arithmetic; Very large scale integration

Indexed keywords

DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; MATHEMATICAL MODELS; PARALLEL PROCESSING SYSTEMS; VLSI CIRCUITS;

RESIDUE ARITHMETIC; RESIDUE NUMBER SYSTEMS (RNS);

MICROPROCESSOR CHIPS;

EID: 0032095889     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.678485     Document Type: Article

References (11)

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