An RNS to Binary Converter in a Three Moduli Set with Common Factors

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 42, Issue 4, 1995, Pages 298-301

  Premkumar, A Benjamin ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING; FAULT TOLERANT COMPUTER SYSTEMS; LOGIC CIRCUITS; MATHEMATICAL TECHNIQUES; PARALLEL PROCESSING SYSTEMS; TABLE LOOKUP;

CHINESE REMAINDER THEOREM; MIXED RADIX CONVERTER; RESIDUE NUMBER SYSTEM;

NUMBER THEORY;

EID: 0029292258     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.378047     Document Type: Article

References (12)

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3. to converter design,” IEEE Trans. Circuits Syst., vol. 35, no. 9, pp. 1156-1158, Sept. 1988.
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9. A. B. Premkumar, “An RNS to binary converter in 2n+1, 2N, 2N—1 moduli set,” IEEE Trans. Circuits Syst., vol. 39, no. 7, pp. 480-482, July 1992.
10. B. Arambepola, “Common VLSI architecture for a practically useful residue number system,” in IEEE Int. Symp. Circuits Syst., Singapore, June 1991, pp. 2951-2954.
11. S. Waser and M. J. Flynn, Introduction to Arithmetic for Digital System Designers. New York: Holt, Rinehart and Winston, 1982.
12. G. Bi and E. V. Jones, “Fast conversion between binary and residue numbers,” Electron. Lett., vol. 24, no. 19, pp. 1195-1197, Sept. 1988.