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Volumn 19, Issue 3, 1998, Pages 86-88

A multilevel approach toward quadrupling the density of flash memory

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CALCULATIONS; COMPUTER SYSTEMS PROGRAMMING; ELECTRIC CURRENTS; INTEGRATED CIRCUIT TESTING; SEMICONDUCTOR STORAGE; STORAGE ALLOCATION (COMPUTER); VOLTAGE CONTROL;

EID: 0032028727     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.661173     Document Type: Article
Times cited : (5)

References (11)
  • 1
    • 0022738392 scopus 로고
    • A four-state EEPROM using floating-gate memory cells
    • Mar.
    • C. Bleiker and H. Melchior, "A four-state EEPROM using floating-gate memory cells," IEEE J. Solid-State Circuits, vol. SC-22, p. 460, Mar. 1987.
    • (1987) IEEE J. Solid-State Circuits , vol.SC-22 , pp. 460
    • Bleiker, C.1    Melchior, H.2
  • 7
    • 0029714969 scopus 로고    scopus 로고
    • Impact of cell threshold voltage distribution in the array of flash memories on scaled and multilevel flash cell design
    • K. Yoshikawa, "Impact of cell threshold voltage distribution in the array of flash memories on scaled and multilevel flash cell design," in Symp. VLSI Technol. Dig., 1996, p. 240.
    • (1996) Symp. VLSI Technol. Dig. , pp. 240
    • Yoshikawa, K.1
  • 9
    • 0029493274 scopus 로고
    • Multilevel flash/EPROM memories: New self-convergent programming methods for low-voltage applications
    • M. Chi and A. Bergemont, "Multilevel flash/EPROM memories: New self-convergent programming methods for low-voltage applications," IEEE IEDM Tech. Dig., 1995, p. 271.
    • (1995) IEEE IEDM Tech. Dig. , pp. 271
    • Chi, M.1    Bergemont, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.