Parameter extraction for statistical 1c modeling based on recursive inverse approximation

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 16, Issue 11, 1997, Pages 1250-1259

  Qu, Ming ^a,b   Styblinski, M A ^a,b  

^a NATIONAL SEMICONDUCTOR CORPORATION   (United States)

^b Department of Electrical and Computer Engineering   (United States)

Author keywords

Design for manufacturability; Parameter extraction; Statistical design; Statistical modeling

Indexed keywords

COMPUTER AIDED DESIGN; ERRORS; MATHEMATICAL MODELS; MATHEMATICAL TECHNIQUES; MOSFET DEVICES; STATISTICAL METHODS;

PARAMETER EXTRACTION; RECURSIVE INVERSE APPROXIMATION;

INTEGRATED CIRCUITS;

EID: 0031273121     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.663816     Document Type: Article

References (19)

1. T. Koskinen and P. Y. K. Cheung, "Statistical and behavioral modeling of analogue integrated circuits," Proc. Inst. Elect. Eng., vol. 140, pt. G, pp. 171-176, June 1993.
2. E. D. Boskin, C. J. Spanos, and G. Korsh, "A method for modeling the manufacturability of 1C designs," in Proc. IEEE Int. Conf. Microelectron. Test Structures, Barcelona, Spain, Mar. 1993, pp. 241-246.
3. C. J. Spanos and S. W. Director, "Parameter extraction for statistical 1C process characterization," IEEE Trans. Computer-Aided Design, vol. CAD-5, pp. 66-78, Jan. 1986.
4. J. A. Power, B. Donnellan, A. Mathewson, and W. A. Lane, "Relating statistical MOSFET model parameter variabilities to 1C manufacturing process fluctuations enabling realistic worst case design," IEEE Trans. Semiconduct. Manufact., vol. 7, pp. 306-318, Aug. 1994.
5. M. S. Sharma and N. D. Arora, "OPTIMA: A nonlinear model parameter extraction program with statistical confidence region algorithm," IEEE Trans. Computer-Aided Design, vol. 12, pp. 982-987, July 1993.
6. W. M. Zuberek, A. Konczykowska, C. Algani, H. Wang, and J. Dangla, "Simulation-based parameter extraction, its implementation and some applications," Proc. Inst. Elect. Eng., Circuits, Devices, Syst., vol. 141, pp. 129-134, Apr. 1994.
7. T. Sakurai, B. Lin, and A. R. Newton, "Fast simulated diffusion: An optimization algorithm for multiminimum problems and its application to MOSFET model parameter extraction," IEEE Trans. Computer-Aided Design, vol. 11, pp. 228-234, Feb. 1992.
8. H. P. Tuinhout, S. Swaving, and J. J. M. Joosten, "A fully analytical MOSFET model parameter extraction procedure," in Proc. IEEE Int. Conf. Microelectron. Test Structure, Long Beach, CA, Feb. 1988, pp. 79-84.
9. P. R. Karlsson and K. O. Jeppson, "Direct extraction of MOS transistor model parameters," Analog Integr. Circuits Signal Process., vol. 5, pp. 199-212, 1994.
10. J. A. Connelly and P. Choi, Macromodeling with SPICE. Englewood Cliffs, NJ: Prentice-Hall, 1992.
11. Saber User's Guide, Analog, Inc., Beaverton, OR, 1994.
12. Y. P. Tsividis and K. Suyama, "MOSFET modeling for analog circuit CAD: Problems and prospects," IEEE J. Solid-State Circuits, vol. 29, pp. 210-216, Mar. 1994.
13. M. Qu and M. A. Styblinski, "A heuristic global optimization algorithm and its application to CMOS circuit variability minimization," in Proc. ISCAS, Chicago, IL, May 1993, pp. 1809-1812.
14. P. E. Gill, W. Murry, and M. H. Wright, Practical Optimization. London, U.K.: Academic, 1981.
15. M. Qu, "Statistical modeling of large analog integrated circuits and its applications to design for quality and manufacturability," Ph.D. dissertation, Texas A&M Univ., College Station, 1995.
16. G. Massobrio and P. Antognetti, Semiconductor Device Modeling with SPICE. New York: McGraw-Hill, 1993.
17. J. A. Neider and R. Mead, "A simplex method for function minimization," Computer J.. vol. 7, pp. 308-313, 1965.
18. MATH/Library User's Manual, IMSL, Inc., Houston, TX, 1987.
19. N. Saxena and J. J. Clark, "A four-quadrant CMOS analog multiplier for analog nueral networks," IEEE J. Solid-State Circuits, vol. 29, pp. 746-749, June 1994.