High-speed divide-by-4/5 counter for a dual-modulus prescaler

Electronics Letters

Volumn 33, Issue 20, 1997, Pages 1691-1692

  Yang, Ching Yuan ^a   Dehng, Guang Kaai ^a   Liu, Shen Iuan ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

CMOS integrated circuits; Dividing circuits

Indexed keywords

CMOS INTEGRATED CIRCUITS; COUNTING CIRCUITS; FLIP FLOP CIRCUITS; LOGIC GATES; NAND CIRCUITS; TIMING CIRCUITS; WAVEFORM ANALYSIS;

DUAL MODULUS PRESCALER;

DIVIDING CIRCUITS (ARITHMETIC);

EID: 0031220941     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19971175     Document Type: Article

References (7)

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7. KRAMBECK, R.H.: 'High-speed compact circuits with CMOS', IEEE J. Solid-State Circuits, 1982, SC-17, pp. 614-619