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Volumn 18, Issue 8, 1997, Pages 391-393

Fabrication and characterization of an InAlAs/InGaAs/InP ring oscillator using integrated enhancement- and depletion-mode high-electron mobility transistors

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC LOSSES; GATES (TRANSISTOR); LOGIC CIRCUITS; NATURAL FREQUENCIES; OSCILLATORS (ELECTRONIC); SEMICONDUCTING ALUMINUM COMPOUNDS; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTING INDIUM PHOSPHIDE; SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 0031212433     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.605449     Document Type: Article
Times cited : (27)

References (14)
  • 1
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    • Monolithic integration of InAlAs/InGaAs/InP enhancement- and depletion-mode high-electron mobility transistors
    • San Francisco, CA, Dec. 8-11
    • A. Mahajan, P. Fay, M. Arafa, G. Cueva, and I. Adesida, "Monolithic integration of InAlAs/InGaAs/InP enhancement- and depletion-mode high-electron mobility transistors," in 1996 IEEE IEDM, San Francisco, CA, Dec. 8-11, 1996, pp. 51-54.
    • (1996) 1996 IEEE IEDM , pp. 51-54
    • Mahajan, A.1    Fay, P.2    Arafa, M.3    Cueva, G.4    Adesida, I.5
  • 2
    • 0026908331 scopus 로고
    • Process for enhancement/depletion-mode GaAs/InGaAs/AlGaAs pseudomorphic MODFET's using selective wet gate recessing
    • M. Tong, K. Nummila, J.-W. Seo, A. Ketterson, and I. Adesida, "Process for enhancement/depletion-mode GaAs/InGaAs/AlGaAs pseudomorphic MODFET's using selective wet gate recessing," Electron Lett., vol. 28, pp. 1633-1634, 1992.
    • (1992) Electron Lett. , vol.28 , pp. 1633-1634
    • Tong, M.1    Nummila, K.2    Seo, J.-W.3    Ketterson, A.4    Adesida, I.5
  • 6
    • 0026106445 scopus 로고
    • 11.6 Gbps 1:4 demultiplexer using double pulse-doped quantum well GaAs/AlGaAs transistors
    • M. Lang, U. Nowotny, and M. Berroth, "11.6 Gbps 1:4 demultiplexer using double pulse-doped quantum well GaAs/AlGaAs transistors," Electron Lett., vol. 27, pp. 459-460, 1991.
    • (1991) Electron Lett. , vol.27 , pp. 459-460
    • Lang, M.1    Nowotny, U.2    Berroth, M.3
  • 7
    • 0026172499 scopus 로고
    • AlGaAs/GaAs-based HEMT's, inverters, and ring oscillators with InGaAs and AlGaAs etchstop layers
    • F. Ren, S. Pearton, R. Kopf, S. Chu, S. Pei, "AlGaAs/GaAs-based HEMT's, inverters, and ring oscillators with InGaAs and AlGaAs etchstop layers," Electron. Lett., vol. 27, pp. 1175-1177, 1991.
    • (1991) Electron. Lett. , vol.27 , pp. 1175-1177
    • Ren, F.1    Pearton, S.2    Kopf, R.3    Chu, S.4    Pei, S.5
  • 9
    • 0030391884 scopus 로고    scopus 로고
    • Subfemtojoule 0.15-μm InGaP/InGaAs/GaAs pseudomorphic HEMT DCFL circuits under 1 V supply voltage
    • H. Suehiro, M. Shima, T. Shimura, and N. Hara, "Subfemtojoule 0.15-μm InGaP/InGaAs/GaAs pseudomorphic HEMT DCFL circuits under 1 V supply voltage," IEEE GaAs Symp. Tech. Dig., 1996, pp. 77-80.
    • (1996) IEEE GaAs Symp. Tech. Dig. , pp. 77-80
    • Suehiro, H.1    Shima, M.2    Shimura, T.3    Hara, N.4
  • 10
    • 0027696288 scopus 로고
    • Frequency divider using InAlAs/InGaAs HEMT DCFL-NOR gates
    • N. Harada, S. Kuroda, Y. Watanabe, and K. Hikosaka, "Frequency divider using InAlAs/InGaAs HEMT DCFL-NOR gates," Electron. Lett., vol. 29, pp. 2100-2101, 1993.
    • (1993) Electron. Lett. , vol.29 , pp. 2100-2101
    • Harada, N.1    Kuroda, S.2    Watanabe, Y.3    Hikosaka, K.4
  • 12
    • 0030085596 scopus 로고    scopus 로고
    • Highperformance InP-based enhancement-mode HEMT's using nonalloyed ohmic contacts and Pt-based buried-gate technologies
    • K. Chen, T. Enoki, K. Maezawa, K. Arai, and M. Yamamoto, "Highperformance InP-based enhancement-mode HEMT's using nonalloyed ohmic contacts and Pt-based buried-gate technologies," IEEE Trans. Electron Devices, vol. 43, pp. 252-257, 1996.
    • (1996) IEEE Trans. Electron Devices , vol.43 , pp. 252-257
    • Chen, K.1    Enoki, T.2    Maezawa, K.3    Arai, K.4    Yamamoto, M.5
  • 13
    • 3242840395 scopus 로고    scopus 로고
    • High-performance enhancement mode high-electron mobility transistors (E-HEMT's) lattice matched to InP
    • A. Mahajan, P. Fay, C. Caneau, and I. Adesida, "High-performance enhancement mode high-electron mobility transistors (E-HEMT's) lattice matched to InP," Electron Lett., vol. 32, pp. 1037-1038, 1996.
    • (1996) Electron Lett. , vol.32 , pp. 1037-1038
    • Mahajan, A.1    Fay, P.2    Caneau, C.3    Adesida, I.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.