Performance estimation of Si/SiGe hetero-CMOS circuits

Electronics Letters

Volumn 33, Issue 3, 1997, Pages 208-210

  Hagelauer, R ^a   Ostermann, T ^a   Konig U ^b   Gluck M ^b   Hock G ^c  

^a JOHANNES KEPLER UNIVERSITY LINZ   (Austria)

^b DAIMLER AG   (Germany)

^c UNIVERSITY OF ULM   (Germany)

Author keywords

CMOS integrated circuits; Silicon; Silicon germanium

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POWER SUPPLIES TO APPARATUS; FIELD EFFECT TRANSISTORS; FLIP FLOP CIRCUITS; HETEROJUNCTIONS; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; TRANSCONDUCTANCE;

DRAIN CURRENT; MODULATION DOPED FIELD EFFECT TRANSISTOR; VELOCITY SATURATION CHARGE CONTROL MODEL;

CMOS INTEGRATED CIRCUITS;

EID: 0030734469     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19970166     Document Type: Article

References (12)

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