Integrated systems

IEEE Transactions on Electron Devices

Volumn 43, Issue 10, 1996, Pages 1678-1687

  Bartelink, Dirk J ^a,b  

^a HEWLETT PACKARD LABORATORIES   (United States)

^b SEMICONDUCTOR RESEARCH CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COST ACCOUNTING; ELECTRONICS PACKAGING; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; MONOLITHIC INTEGRATED CIRCUITS; MULTICHIP MODULES; PRODUCTION CONTROL; RELIABILITY;

INTEGRATED SYSTEMS;

DIGITAL INTEGRATED CIRCUITS;

EID: 0030269810     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.536814     Document Type: Article

References (16)

1. National Technology Roadmap for Semiconductors, Semicond. Ind. Assoc., San Jose, CA, 1994.
2. |2] The nomenclature "system on a chip" has already been claimed for higher integration of pure digital systems (except for imaging): see "Digest of technical papers," in '96 IEEE Int. Solid-Stale Circ. Conf.
3. W. R. Lynch has previously proposed this nomenclature.
4. R. Tummala and E. RymaszcwskiControlled-collapse chip connectionC4," in Microelectronics Packaging Handbook. New York: Van Nostrand-Reinhold, ISBN 0 442-20578-3, ch. 6.
5. National TechnologyRoadmap for Semiconductors, Semicond. Ind. Assoc., San Jose, CA, 1994, p. 59.
6. National Technology Roadmap for Semiconductors, Semicond. Ind. Assoc., San Jose, CA, 1994, p. 63.
7. D. J. BartelinkStatistical metrology-At the root of manufacturing control." J. Vac. Sei. Tectmoi. vol. B 12, no. 4, pp. 2785-2794, July/Aug. 1994.
8. A. Sangiovanni-Vincsntelli, private communication.
9. T. Core, R. S. Payne, D. Quinn, S. Sherman, and W. K. TsangIntegrated, complete, affordable accelerometer for air bag applications," in Proc. Sensor Expo., Chicago, IL, 1991, pp. 204B-1. 4.
10. D. J. BartelinkA unified approach to chip, test, anj assembly technologies for MCM's," in Proc. '95 IEEE Multi-Chip Module Conf., Santa Cruz, CA, Jan. 1995, pp. 221 228.
11. D. J. Bartelink, ''A unified approach to chip, test, and assembly technologies fur MCM's," in Proc. '95 IEEE Multi-Chip Module Conf., Santa Cni7.'CA, Jan. 199.1, Fig. 1, and discussion on p. 222.
12. M. Y. Lau, K. L. Tai, R. C. Frye, M. Saito, and D. D. Bacon. "A versatile, 1C process compatible MCM-D for high performance and low cost applications," in Proc. 1SHM/IEPS Int. Conf. Multichip Modules, Denver, CO, 1993, pp. 107-112.
13. K. Rahmat, O. S. Nakagawa, S.-Y. Oh, and J. MollA scaling scheme for interconnect in deep-submicron processes," Iml. Electron Dev. Meet. Tech. Dig., pp. 245-248, 1995.
14. D. J. Bartelink, unpublished.
15. H. Han, L. Weiss, and M. L. ReedMicromechanical velcro," IEEE J. Microelectromechanical Syst., vol. 1. no. 1, p. 37, 1992.
16. The author thanks Larry Gilg for suggesting this nomenclature.