Unified approach to chip, test, and assembly technologies for MCMs

Proceedings of the IEEE Multi-Chip Module Conference

Volumn , Issue , 1995, Pages 221-228

  Bartelink, Dirk J ^a  

^a HEWLETT PACKARD LABORATORIES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASSEMBLY; CMOS INTEGRATED CIRCUITS; COSTS; ELECTRONICS PACKAGING; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; MICROPROCESSOR CHIPS; STANDARDS; TECHNOLOGY;

BONDING PAD; POST FAB CONSTRAINTS; WAFER FAB;

MULTICHIP MODULES;

EID: 0029225482     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)