New Method for Lifetime Evaluation of Gate Oxide Damaged by Plasma Processing

IEEE Electron Device Letters

Volumn 16, Issue 5, 1995, Pages 187-189

  Eriguchi, Koji ^a   Uraoka, Yukiharu ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; CURRENT DENSITY; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC BREAKDOWN; FAILURE ANALYSIS; MATHEMATICAL MODELS; MOSFET DEVICES; OXIDES; PLASMA APPLICATIONS;

CHANGE TO BREAKDOWN; CONSTANT CURRENT INJECTION; CONSTANT VOLTAGE STRESS; GATE OXIDE; PLASMA PROCESSING; TIME TO BREAKDOWN;

GATES (TRANSISTOR);

EID: 0029309055     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.382235     Document Type: Article

References (16)

1. W. M. Greene, J. B. Kreger, and G. Kooi, “Magnetron etching of polysilicon: Electrical damage,” J. Vac. Sci. Technol. B9, p. 366, 1991.
2. S. Fang and J. P. McVittie, “Thin-oxide damage from gate charging during plasma processing,” IEEE Electron Device Lett., vol. 13, no. 5, p. 288, 1992.
3. H. Shin and C. Hu, “Dependence of plasma-induced oxide charging current on Al antenna geometry,” IEEE Electron Device Lett., vol. 13, no. 12, p. 600, 1992.
4. X. Li, J.-T. Hsu, P. Aum, D. Chan, J. Rembetski, and C. R. Viswanathan, “Plasma-damaged oxide reliability study correlating both hot-carrier injection and time-dependent dielectric breakdown,” IEEE Electron Device Lett., vol. 14. no. 2, p. 91, 1993.
5. H. Shin, K. Noguchi, and C. Hu, “Modeling oxide thickness dependence of charging damage by plasma processing,” IEEE Electron Device Lett., vol. 14, no. 11, p. 509, 1993.
6. K. Eriguchi, Y. Uraoka, H. Nakagawa, T. Tamaki, M. Kubota, and N. Nomura. “Quantitative evaluation of gate oxide damage during plasma processing using antenna-structure capacitors,” Jpn. J. Appl. Phys., vol. 33, no. 1A, p. 83, 1994.
7. I.-C. Chen, S. E. Holland, and C. Hu, “Electrical breakdown in thin gate and tunneling oxides,” IEEE Trans. Electron Devices, vol. ED-32, no. 2, p. 413, 1985.
8. M.-S. Liang, Y. J. Choi, P. K. Ko, and C. Hu, “Characterization of very thin gate-oxide MOS devices,” in Tech. Dig. IEDM, 1984, p. 152.
9. M. M. Moslehi and K. C. Saraswat, “Studies of trapping and conduction in ultrathin SiO2 gate insulators,” in Tech. Dig. IEDM, 1984, p. 157.
10. T. Kubota, P. Apte, and K. C. Saraswat, “Constant current stress breakdown in ultrathin SiO2 films,” J. Electrochem. Soc., vol. 140, p. 770, 1993.
11. M. A. Miner, “Cumulative damage in fatigue,” J. Appl. Mechanics, vol. 12, p, A-159, 1945.
12. E. L. Robinson and N. Y. Schenectady, “Effect of temperature variation on the long-time rupture strength of steels,” Trans. American Soc. Mechanical Engineers, 74, p. 777. 1952.
13. The Society of Materials Science, Japan, “Strength and fracture of materials,” M. Oominami. Ed., Kyoto. 1986, p. 120 (in Japanese).
14. Y. Uraoka, K. Eriguchi, T. Tamaki, and K. Tuji, “Evaluation technique of gate oxide damage,” in Proc. IEEE Int. Conf Microelectronic Test Structures, vol. 6, p, 149, 1993.
15. M.-S. Liang and C. Hu, “Electron trapping in very thin thermal silicon dioxides,” in Tech. Dig. IEDM, 1981, p. 396.
16. A. Berman, “Time-zero dielectric reliability test by a ramp method,” in Proc. IEEE Reliability Physics Symp., 1981, p. 204.