A silicon primitive for competitive learning

Advances in Neural Information Processing Systems

Volumn , Issue , 2001, Pages

  Hsu, David ^a   Figueroa, Miguel ^a   Diorio, Chris ^a  

^a UNIVERSITY OF WASHINGTON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLASSIFICATION AND CLUSTERING; COMPETITIVE LEARNING; LOCAL ADAPTATION; SIMILARITY COMPUTATION;

VLSI CIRCUITS;

EID: 0009613309     PISSN: 10495258     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. M.A. Arbib (ed.), The Handbook of Brain Theory and Neural Networks, Cambridge, MA: The MIT Press, 1995.
2. H.C. Card, D.K. McNeill, and C.R. Schneider, "Analog VLSI circuits for competitive learning networks", in Analog Integrated Circuits and Signal Processing, 15, pp. 291-314, 1998.
3. C. Diorio, "A p-channel MOS synapse transistor with self-convergent memory writes", IEEE Transactions on Electron Devices, Vol. 47, no. 2, pp 464-472, 2000.
4. P. Hasler, "Continuous-Time Feedback in Floating-Gate MOS Circuits," to appear in IEEE Transactions on Circuits and Systems II, Feb. 2001
5. T. Allen et al, "Electrically adaptable neural network with post-processing circuitry," U.S. Patent No. 5, 331, 215, issued July 19, 1994.
6. 2", Journal of Applied Physics, Vol. 40(1), pp. 278-283, 1969.
7. E. Takeda, C. Yang, and A. Miura-Hamada, Hot Carrier Effects in MOS Devices, San Diego, CA: Academic Press, 1995.
8. T. Delbruck, "Bump circuits for computing similarity and dissimilarity of analog voltages", CNS Memo 26, California Institute of Technology, 1993.
9. D. Hsu, M. Figueroa, and C. Diorio, "A silicon primitive for competitive learning," UW CSE Technical Report no. 2000-07-01, 2000.
10. J. Lazzaro, S. Ryckebusch, M.A. Mahowald, and C.A. Mead, "Winner-take-all networks of O(n) complexity", in Advances in Neural Information Processing Systems, San Mateo, CA: Morgan Kaufman, Vol. 1, pp 703-711, 1989.