A 32Mb-4b/cell analog flash memory supporting variable density with 3V-only supply and serial I/O

European Solid-State Circuits Conference

Volumn , Issue , 1999, Pages 130-133

  Rolandi, Pier Luigi ^a   Pasotti, Marco ^a   Campardo, Giovanni ^a   Canegallo, Roberto ^a   De Sandre, Guido ^a   Guaitini, Giovanni ^a   Issartel, Cedric ^a   Lhermet, Frank ^a   Maurelli, Alfonso ^a   Rocchi, Alessandro ^a   Kramer, Alan ^a  

^a STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL HOT ELECTRON PROGRAMMING; EMBEDDED MICROCONTROLLER; FLASH PROGRAMMING; FLASH TECHNOLOGY; FOWLER-NORDHEIM; FULLY INTEGRATED; SMALL FORM FACTORS; VARIABLE DENSITY;

CHIP SCALE PACKAGES;

FLASH MEMORY;

EID: 0005209142     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. M. Bauer et al., "A Multilevel-Cell 32Mb Flash Memory, " in 1995 ISSCC Dig. Tech. Papers, Feb. 1995, pp. 132-133.
2. T-S. Jung et al., "A 3.3V 128Mb Multi-level NAND Flash Memory for Mass Storage Application, " in 1996 ISSCC Dig. Tech. Papers, Feb. 1996, pp. 32-33.
3. H. V. Tran et al., "A 2.5V 256-Level Non-Volatile Analog Storage Device Using EEPROM Technology, " in 1996 ISSCC Dig. Tech. Papers, Feb. 1996, pp. 270-271.
4. P. L. Rolandi et al., "1M-Cell 6b/Cell Analog Flash Memory for Digital Storage, " in 1998 ISSCC Dig. Tech. Papers, Feb. 1998, pp. 334-335.
5. P.W. Li, M.J. Chin, P.R. Gray and R. Castello, "A Ratio-Independent Algorithmic Analog-to-Digital Conversion Technique", IEEE Journal of Solid-State Circuits, Vol. SC-19, pp. 828-836, December 1984.
6. M. Dallabora et al., "A 20MB/s Data Rate 2.5V Flash Memory with Current-Controlled Field Erasing for 1M Cycle Endurance, " in 1997 ISSCC Dig. Tech. Papers, Feb. 1997, pp. 396-397.