Technology mapping for hot-carrier reliability enhancement

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 3216, Issue , 1997, Pages 42-50

  Chen, Zhan ^a   Koren, Israel ^a  

^a University of Massachusetts   (United States)

Author keywords

Design for reliability; Hot carrier effect; Technology mapping

Indexed keywords

CELL LIBRARIES; DESIGN FOR RELIABILITY; FAILURE MECHANISMS; HIGH DENSITIES; HOT-CARRIER EFFECT; LOGIC FUNCTIONS; LOGIC OPTIMIZATIONS; LOGIC SYNTHESES; LOW POWERS; RELIABILITY ENHANCEMENTS; SIGNIFICANT IMPACTS; TECHNOLOGY MAPPING; TECHNOLOGY MAPPING ALGORITHMS; VLSI DESIGNS;

CIVIL AVIATION; CONFORMAL MAPPING; DESIGN; EMBEDDED SYSTEMS; FAILURE ANALYSIS; MOSFET DEVICES; OPTIMIZATION; QUALITY ASSURANCE; RELIABILITY ANALYSIS; SAFETY FACTOR; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICES; SWITCHING CIRCUITS; TECHNOLOGY; VLSI CIRCUITS;

RELIABILITY;

EID: 0003834353     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.284706     Document Type: Conference Paper

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