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Volumn , Issue , 1999, Pages 336-339

A new configurable and scalable architecture for rapid prototyping of asynchronous designs for signal processing

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; NETWORK ARCHITECTURE; RAPID PROTOTYPING;

EID: 0003757462     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASIC.1999.806530     Document Type: Conference Paper
Times cited : (2)

References (11)
  • 1
    • 0027641441 scopus 로고
    • Using FPGAS to implement self-timed systems
    • Erik Brunvand. Using FPGAs to implement self-timed systems. Journal of VLSI Signal Processing, 6(2), 1993.
    • (1993) Journal of VLSI Signal Processing , vol.6 , Issue.2
    • Brunvand, E.1
  • 2
    • 85040567801 scopus 로고    scopus 로고
    • Paradise: Design environment for parallel & distributed, embedded real-time Systems
    • Kluwer Academic Publishers
    • W. Hardt, P. Altenbcrnd, F. J. Rammig ct. al. Paradise: Design environment for parallel & distributed, embedded real-time Systems. In DIPES'98. Kluwer Academic Publishers, 1998.
    • (1998) DIPES'98
    • Hardt, W.1    Altenbcrnd, P.2    Rammig, F.J.3
  • 6
    • 0021619710 scopus 로고
    • A new algorithm to compute the discrete cosine transform
    • Dec.
    • B. G. Lee. A new algorithm to compute the discrete cosine transform. IEEE Trans, on Acoustics, Speach and Signal Processing, 32(6): 1243-1245, Dec. 1984.
    • (1984) IEEE Trans, on Acoustics, Speach and Signal Processing , vol.32 , Issue.6 , pp. 1243-1245
    • Lee, B.G.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.