-
1
-
-
0027593926
-
On the electrical conduction in the dielectric layers
-
C. Cobianu, O. Popa, and D. Dascalu, "On the electrical conduction in the dielectric layers," IEEE Electron Device Lett., vol. 14, p. 213, 1993.
-
(1993)
IEEE Electron Device Lett.
, vol.14
, pp. 213
-
-
Cobianu, C.1
Popa, O.2
Dascalu, D.3
-
2
-
-
0022291930
-
Studies of thin poly-Si oxides for e and E2PROM
-
T. Ono, T. Mori, T. Ajioka, and T. Takayashiki, "Studies of thin poly-Si oxides for E and E2PROM," in IEDM Tech. Dig., 1985, pp. 380-383.
-
(1985)
IEDM Tech. Dig.
, pp. 380-383
-
-
Ono, T.1
Mori, T.2
Ajioka, T.3
Takayashiki, T.4
-
3
-
-
0024053861
-
Polarity asymmetry of oxides grown on polycrystalline silicon
-
July
-
J. C. Lee and C. Hu, "Polarity asymmetry of oxides grown on polycrystalline silicon," IEEE Trans. Electron Devices, vol. 35, p. 1063, July 1988.
-
(1988)
IEEE Trans. Electron Devices
, vol.35
, pp. 1063
-
-
Lee, J.C.1
Hu, C.2
-
4
-
-
0030083374
-
The characteristics of polysilicon oxide grown in pure N2O
-
Feb
-
C. S. Lai, T. F. Lei, and C. L. Lee, "The characteristics of polysilicon oxide grown in pure N2O," IEEE Trans. Electron Devices, vol. 43, pp. 1-6, Feb. 1996
-
(1996)
IEEE Trans. Electron Devices
, vol.43
, pp. 1-6
-
-
Lai, C.S.1
Lei, T.F.2
Lee, C.L.3
-
5
-
-
0022756053
-
Surface roughness and electrical conduction of oxide/polysilicon interfaces
-
L. Faraone and G. Harbeke, "Surface roughness and electrical conduction of oxide/polysilicon interfaces," J. Electrochem. Soc., vol. 133, no. 7, p. 1410, 1986.
-
(1986)
J. Electrochem. Soc.
, vol.133
, Issue.7
, pp. 1410
-
-
Faraone, L.1
Harbeke, G.2
-
6
-
-
36449005885
-
Polycrystalline silicon oxidation method improving surface roughness at the oxide/polycrystalline silicon interface
-
M. C. Jun, Y. S. Kim, and M. K. Han, "Polycrystalline silicon oxidation method improving surface roughness at the oxide/polycrystalline silicon interface," Appl. Phys. Lett., vol. 66, no. 17, p. 2206, 1995.
-
(1995)
Appl. Phys. Lett.
, vol.66
, Issue.17
, pp. 2206
-
-
Jun, M.C.1
Kim, Y.S.2
Han, M.K.3
-
7
-
-
0022806033
-
Thermal SiO2 films on n+ polycrystalline silicon: Electrical conduction and breakdown
-
Nov
-
L. Faraone, "Thermal SiO2 films on n+ polycrystalline silicon: Electrical conduction and breakdown," IEEE Trans. Electron Devices, vol. ED-33 p. 1785-1794, Nov. 1986.
-
(1986)
IEEE Trans. Electron Devices
, vol.ED-33
, pp. 1785-1794
-
-
Faraone, L.1
-
8
-
-
0022029355
-
Characterization of thermally oxidized n+ polycrystalline silicon
-
Mar
-
L. Faraone, R. D. Vibronek, and J. T. Mcginn," Characterization of thermally oxidized n+ polycrystalline silicon," IEEE Trans. Electron Devices, vol. ED-32, pp. 577-584, Mar. 1985.
-
(1985)
IEEE Trans. Electron Devices
, vol.ED-32
, pp. 577-584
-
-
Faraone, L.1
Vibronek, R.D.2
McGinn, J.T.3
-
9
-
-
0022288564
-
Reliable CVD inter-poly dielectrics for advanced e and EEPROM
-
S. Mori, T. Matsuda, T. Yanase, Y. Mikata, M. Sato, K. Shinada, K. Yoshikawa, and H. Nozawa, "Reliable CVD inter-poly dielectrics for advanced E and EEPROM," in VLSI Symp. Dig. Tech. Papers, 1985, p. 16.
-
(1985)
VLSI Symp. Dig. Tech. Papers
, pp. 16
-
-
Mori, S.1
Matsuda, T.2
Yanase, T.3
Mikata, Y.4
Sato, M.5
Shinada, K.6
Yoshikawa, K.7
Nozawa, H.8
-
10
-
-
0002227337
-
Planarization interlevel dielectrics by chemical-mechanical polish
-
May
-
S. Sivaram, H. Bath, R. Leggett, A. Maury, K. Monnig, and R. Tolles, "Planarization interlevel dielectrics by chemical-mechanical polish," Solid State Technol., pp. 87-91, May, 1992.
-
(1992)
Solid State Technol.
, pp. 87-91
-
-
Sivaram, S.1
Bath, H.2
Leggett, R.3
Maury, A.4
Monnig, K.5
Tolles, R.6
-
12
-
-
0029375764
-
Physical characterization of chemical mechanical planarized surface for trench isolation
-
I. Ali, M. Rodder, S. R. Roy, G. Shinn, and M. I. Raja," Physical characterization of chemical mechanical planarized surface for trench isolation," J. Electrochem. Soc., vol. 142, no. 9, pp. 3088-3092, 1995.
-
(1995)
J. Electrochem. Soc.
, vol.142
, Issue.9
, pp. 3088-3092
-
-
Ali, I.1
Rodder, M.2
Roy, S.R.3
Shinn, G.4
Raja, M.I.5
-
13
-
-
0027867595
-
A highly manufacturable trench isolation process for deep submicron DRAM's
-
P. C. Fazan and V. K. Mathews, "A highly manufacturable trench isolation process for deep submicron DRAM's," in IEDM Tech. Dig., 1993, pp. 57-60.
-
(1993)
IEDM Tech. Dig.
, pp. 57-60
-
-
Fazan, P.C.1
Mathews, V.K.2
-
14
-
-
0030109917
-
Fabrication of thin film transistors by chemical mechanical polished polycrystalline silicon films
-
C. Y. Chang, H. Y. Lin, T. F. Lei, J. Y. Cheng, L. P. Chen, and B. T. Dai, "Fabrication of thin film transistors by chemical mechanical polished polycrystalline silicon films," IEEE Electron Device Lett., vol. 17, p. 100, 1996.
-
(1996)
IEEE Electron Device Lett.
, vol.17
, pp. 100
-
-
Chang, C.Y.1
Lin, H.Y.2
Lei, T.F.3
Cheng, J.Y.4
Chen, L.P.5
Dai, B.T.6
-
15
-
-
0031167987
-
Improvement of polysilicon oxide by growing on polished polysilicon film
-
June
-
T. F. Lei, J. Y. Cheng, S. Y. Shiau, T. S. Chao, and C. S. Lai, "Improvement of polysilicon oxide by growing on polished polysilicon film," IEEE Electron Device Lett., vol. 18, pp. 270-271, June 1997
-
(1997)
IEEE Electron Device Lett.
, vol.18
, pp. 270-271
-
-
Lei, T.F.1
Cheng, J.Y.2
Shiau, S.Y.3
Chao, T.S.4
Lai, C.S.5
-
16
-
-
0029392111
-
A novel planarization of trench isolation using polysilicon refill and etchback of chemical-mechanical polish
-
J. Y. Cheng, T. F. Lei, and T. S. Chao, "A novel planarization of trench isolation using polysilicon refill and etchback of chemical-mechanical polish," J. Electrochem. Soc., vol. 142, no. 10, pp. L187-L188, 1995.
-
(1995)
J. Electrochem. Soc.
, vol.142
, Issue.10
-
-
Cheng, J.Y.1
Lei, T.F.2
Chao, T.S.3
-
17
-
-
0026105473
-
Polyoxide thinning limitation and superior ONO interpoly dielectric for nonvolatile memory devices
-
Feb
-
S. Mori, N. Arai, Y. Kaneko, and K. Yoshikawa," Polyoxide thinning limitation and superior ONO interpoly dielectric for nonvolatile memory devices," IEEE Trans. Electron Devices, vol. 38, pp. 270-277, Feb. 1991.
-
(1991)
IEEE Trans. Electron Devices
, vol.38
, pp. 270-277
-
-
Mori, S.1
Arai, N.2
Kaneko, Y.3
Yoshikawa, K.4
-
18
-
-
19644381145
-
Low leakage current polysilicon oxide grown by two-step oxidation
-
Y. Mikada, S. Mori, K. Shinada, and T. Usami," Low leakage current polysilicon oxide grown by two-step oxidation," in IEEE IRPS, 1985, pp. 32-38.
-
(1985)
IEEE IRPS
, pp. 32-38
-
-
Mikada, Y.1
Mori, S.2
Shinada, K.3
Usami, T.4
-
19
-
-
0023825994
-
Charge trapping in oxide grown on polycrystalline silicon layers
-
E. Ave, O. Abramson, Y. Sonnenblick, and J. Shappir," Charge trapping in oxide grown on polycrystalline silicon layers," J. Electrochem. Soc., vol. 135, no. 1, pp. 182-186, 1988.
-
(1988)
J. Electrochem. Soc.
, vol.135
, Issue.1
, pp. 182-186
-
-
Ave, E.1
Abramson, O.2
Sonnenblick, Y.3
Shappir, J.4
|