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Volumn 16, Issue 3, 1998, Pages 1721-1729
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Optimization of nitrided gate dielectrics by plasma-assisted and rapid thermal processing
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Author keywords
[No Author keywords available]
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Indexed keywords
B ATOMS;
BORON ATOM;
CHANNEL REGION;
DEVICE RELIABILITY;
DIELECTRIC LAYER;
GATE ELECTRODES;
LOW TEMPERATURES;
LOW THERMAL BUDGET;
NITROGEN ATOM;
POLYCRYSTALLINE-SI;
SI SUBSTRATES;
SILICON NITRIDE FILM;
SINGLE WAFER PROCESSING;
SPATIAL DISTRIBUTION;
TUNNELING CURRENT;
ULTRA THIN GATE OXIDE;
ULTRATHIN DIELECTRICS;
ATOMS;
BORON;
BORON NITRIDE;
BUDGET CONTROL;
DIELECTRIC MATERIALS;
GATE DIELECTRICS;
GATES (TRANSISTOR);
MONOLAYERS;
OXIDE FILMS;
PLASMA DEPOSITION;
POLYSILICON;
RAPID THERMAL ANNEALING;
RAPID THERMAL PROCESSING;
SILICON NITRIDE;
SILICON OXIDES;
SILICON WAFERS;
ULTRATHIN FILMS;
CRYSTAL ATOMIC STRUCTURE;
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EID: 0001562219
PISSN: 07342101
EISSN: None
Source Type: Journal
DOI: 10.1116/1.581291 Document Type: Article |
Times cited : (31)
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References (24)
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