메뉴 건너뛰기




Volumn 34, Issue 9, 1999, Pages 1339-1344

Effects of Substrate Resistances on LNA Performance and a Bondpad Structure for Reducing the Effects in a Silicon Bipolar Technology

Author keywords

Bonding; Isolation; Microwave bipolar integrated circuits; Microwave bipolar transistor amplifiers; Noise; Packaging; Substrate resistance

Indexed keywords


EID: 0000133648     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.782095     Document Type: Article
Times cited : (47)

References (6)
  • 1
    • 0030110592 scopus 로고    scopus 로고
    • Modeling and analysis of substrate coupling in integrated circuits
    • Mar.
    • R. Gharpuri and R. G. Meyer. "Modeling and analysis of substrate coupling in integrated circuits," IEEE J. Solid-State Circuits, vol. 31, pp. 344-350, Mar. 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 344-350
    • Gharpuri, R.1    Meyer, R.G.2
  • 2
    • 0030110603 scopus 로고    scopus 로고
    • Verification techniques for substrate coupling and their application to mixed-signal IC design
    • Mar.
    • N. K. Verghese, D. J. Allstot, and M. A. Wolfe, "Verification techniques for substrate coupling and their application to mixed-signal IC design," IEEE J. Solid-State Circuits, vol. 31, pp. 354-361, Mar. 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 354-361
    • Verghese, N.K.1    Allstot, D.J.2    Wolfe, M.A.3
  • 3
    • 0032307874 scopus 로고    scopus 로고
    • A bond-pad structure for reducing effects of substrate resistance on LNA performance in a silicon bipolar technology
    • K. K. O, Minneapolis, MN
    • J. Colvin, S. Bhatia, and K. K. O, "A bond-pad structure for reducing effects of substrate resistance on LNA performance in a silicon bipolar technology," in Proc. 1998 IEEE BCTM. Minneapolis, MN, 1998, pp. 109-112.
    • (1998) Proc. 1998 IEEE BCTM , pp. 109-112
    • Colvin, J.1    Bhatia, S.2
  • 4
    • 0029391707 scopus 로고
    • A low cost and low power silicon npn bipolar process with NMOS transistors (ADRF) for RF and microwave applications
    • K. K. O, Oct.
    • K. K. O, P. Garone, C. Tsai, G. Dawe, B. Scharf, T. Tewksbury, C. Kermarrec, and J. Yasaitis, "A low cost and low power silicon npn bipolar process with NMOS transistors (ADRF) for RF and microwave applications," IEEE Trans. Electron Devices, vol. 42, pp. 1831-1840, Oct. 1995.
    • (1995) IEEE Trans. Electron Devices , vol.42 , pp. 1831-1840
    • Garone, P.1    Tsai, C.2    Dawe, G.3    Scharf, B.4    Tewksbury, T.5    Kermarrec, C.6    Yasaitis, J.7
  • 6
    • 0030270723 scopus 로고    scopus 로고
    • Modeling substrate effects in the design of high-speed Si-bipolar IC's
    • Oct.
    • M. Pfost, H. Rein, and T. Holzwarth, "Modeling substrate effects in the design of high-speed Si-bipolar IC's," IEEE J. Solid-State Circuits, vol. 31, pp. 1493-1501, Oct. 1996.
    • (1996) IEEE J. Solid-State Circuits , vol.31 , pp. 1493-1501
    • Pfost, M.1    Rein, H.2    Holzwarth, T.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.