Effects of CO2 and O2 on the property of tetra methyl tetra cyclo siloxanes based low-k film

Thin Solid Films

Volumn 472, Issue 1-2, 2005, Pages 195-202

  Widodo, J ^a,b,d   Lu, W ^a   Mhaisalkar, S G ^b   Sudijono, J L ^a   Hsia, L C ^a   Shen, L ^c   Zeng, K Y ^c  

^a CHARTERED SEMICONDUCTOR MANUFACTURING LTD   (Singapore)

^b NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^c INSTITUTE OF MATERIALS RESEARCH AND ENGINEERING   (Singapore)

^d NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Chemical vapor deposition (CVD); Dielectric properties; Dielectrics

Indexed keywords

CHEMICAL BONDS; CHEMICAL VAPOR DEPOSITION; DIELECTRIC MATERIALS; ELECTRIC BREAKDOWN; HARDNESS; LEAKAGE CURRENTS; OXYGEN; PARAMETER ESTIMATION; PRESSURE EFFECTS; REFRACTIVE INDEX; STRESS ANALYSIS;

CARBON-DOPED OXIDES; DIELECTRIC CONSTANTS; PROCESS PARAMETERS; TETRA METHYL CYCLO TETRA SILOXANES (TMCTS);

CARBON DIOXIDE;

EID: 9944248586     PISSN: 00406090     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.tsf.2004.07.003     Document Type: Article

References (19)

1. M. Bohr, Technical Digest of International Electronic Device Meeting Conference, Washington, DC, USA, December 1-5, 1995, p. 241.
2. J.A. Lee, J.T. Wetzel, C. Merril, P.S. Ho, Material Research Symposium Proceedings 716, Santa Clara, California, April 1-5, 2002, p. B. 12.12.1.
3. S. Maitrejean, F. Fusalba, M. Patz, V. Jousseaume, T. Mourier, 5th International Interconnects Technology Conference, San Francisco, USA, June 3-5, 2002, p. 206.
4. G. Kloster, T. Scherben, G. Xu, J. Blaine, B. Sun, Y. Zhou, 4th International Interconnects Technology Conference, San Francisco, USA, June 4-6, 2001, p. 242.
5. T. Scherban, B. Sun, J. Blaine, C. Block, B. Jin, E. Andideh, 4th International Interconnects Technology Conference, San Francisco, USA, June 4-6, 2001, p. 257.
6. M. Morgen, E.T. Ryan, J.H. Zhao, C. Hu, Taiheui, P.S. Ho, Annu. Rev. Mater. Sci. 30 (2000) 645.
7. N. Matsuki, A. Matsunoshita, S.L. Jea, Dielectric for VLSI/ULSI Multilayer Interconnect Conference, Santa Clara, California, Feb 28-March 3, 2000, p. 1.
8. C. Xu, A.S. Borovik, Z. Wang, J. Amo, T.H. Baum, Material Research Society Symposium Proceedings 716, Santa Clara, California, April 1-5, 2002, p. B12.8.1.
9. B. Narayanan, R. Kumar, P.D. Foo, J. Microelectron. 33 (2002) 971.
10. K.H. Byung, M.J. Loboda, G.A. Cerny, R.F. Schneider, J.A. Seifferly, J. Inst. Electr. Eng. 52 (2000) 54.
11. A. Grill, V. Patel, J. Appl. Phys. 85-86 (1999) 3314.
12. S. Lin, C. Jin, L. Lui, M. Tsai, M. Daniels, A. Gonzalez, 4th International Interconnects Technology Conference, San Francisco, USA, June 4-6, 2001, p. 146.
13. F. Zhang, O. Leonte, Z.J. Chen, L. Jin, J.A. Levert, A. Camarena, B. Daniels, J. Dunne, T. Nguyen, T.A. Ramos, S. Thanawala, 4th International Interconnects Technology Conference, San Francisco, USA, June 4-6, 2001, p. 57.
14. Y. Uchida, S. Sugahara, M. Matsumura, 14th VLSI and Multilevel Interconnects Conference, Santa Clara. California. June 28-30, 2000, p. 153.
15. H. Cui, H. Lu, I. Bhat, S. Murarka, W. Landford, W. Li, 4th International Interconnects Technology Conference, San Francisco, USA, June 4-6, 2001, p. 45.
16. S. Wolf, R.N. Tauber, Silicon Processing for VLSI Era Vol. 1, 2nd ed., Lattice Press, California, 1999, Chap. 6.
17. J.A. Kerr, in: D.R. Lide (Ed.), CRC Handbook of Chemistry and Physics 1999-2000: A Ready Reference Book of Chemical and Physical Data, 81st ed., CRC Press, Boca Raton, FL, 2000.
18. D.C. Montgomery, Design and Analysis of Experiments, 3rd ed., Wiley, New York, 1991, Chap. 16.
19. B.V. Schravendijk, A.S. Harrus, G. Delgado, B. Sparks, C. Roberts, 9th VLSI and Multilevel Interconnects Conference, Santa Clara, California, June 4-6, 1992, p. 372.