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Volumn , Issue , 2003, Pages 196-201

Defining cost functions for robust IC design and optimization [analog ICs]

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIER DESIGNS; AUTOMATED DESIGN; BETTER PERFORMANCE; CONSTRAINED OPTIMI-ZATION PROBLEMS; MANUFACTURING PROCESS VARIATIONS; MATHEMATICAL FORMULATION; PARALLEL PROCESSING; PENALTY FUNCTION;

EID: 9344264409     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2003.1253828     Document Type: Conference Paper
Times cited : (3)

References (16)
  • 3
    • 0002606725 scopus 로고
    • A new method of constrained optimization and a comparison with other methods
    • April
    • M. J. Box. A new method of constrained optimization and a comparison with other methods. Computer Journal, 8(1):42-52, April 1965
    • (1965) Computer Journal , vol.8 , Issue.1 , pp. 42-52
    • Box, M.J.1
  • 6
    • 0000195442 scopus 로고    scopus 로고
    • Computer-Aided design of analog and mixed-signal integrated circuits
    • December
    • G. G. E. Gielen and R. A. Rutenbar. Computer-Aided design of analog and mixed-signal integrated circuits. Proceedings of the IEEE, 88(12):1825-1854, December 2000
    • (2000) Proceedings of the IEEE , vol.88 , Issue.12 , pp. 1825-1854
    • Gielen, G.G.E.1    Rutenbar, R.A.2
  • 11
    • 0029547474 scopus 로고
    • The linearized performance penalty (LPP) method for optimization of parametric yield and its reliability
    • December
    • K. Krishna and S. W. Director. The linearized performance penalty (LPP) method for optimization of parametric yield and its reliability. IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems, 14(12):1557-1568, December 1995
    • (1995) IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems , vol.14 , Issue.12 , pp. 1557-1568
    • Krishna, K.1    Director, S.W.2
  • 16
    • 19844362344 scopus 로고    scopus 로고
    • Technology migration of a high performance CMOS amplifier using an automated front-To-back analog design flow design, automation and test in europe conference and exhibition 2002
    • Paris, France
    • A. H. Shah. Technology migration of a high performance CMOS amplifier using an automated front-To-back analog design flow. In Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings of Designers? Forum, pages 224-229, Paris, France, 2002
    • (2002) Proceedings of Designers? Forum , pp. 224-229
    • Shah, A.H.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.