Characterization of waferstepper and process related front - To backwafer overlay errors in bulk micro machining using electrical overlay test structures

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5455, Issue , 2004, Pages 398-406

  Van Zeijl, H W ^a   Bijnen, F G C ^b   Slabbekoorn, J ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b ASML   (Netherlands)

Author keywords

Bulk Micro Machining KOH etching; Electrical overlay measurements; Front to Backwafer Alignment

Indexed keywords

ALIGNMENT; CHARACTERIZATION; ERROR DETECTION; OPTIMIZATION; PARAMETER ESTIMATION; PROCESS CONTROL; WSI CIRCUITS;

BACKWAFER OVERLAY ERRORS; FRONT-TO BACKWAFER ALIGNMENT (FTBA); OVERLAY DATA; TEST STRUCTURES;

MICROMACHINING;

EID: 8844220611     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.545900     Document Type: Conference Paper

References (4)

1. H. W. van Zeijl, J. "Slabbekoorn, Characterization of Front- to Backwafer Alignment and Bulk Micromachining Using Electrical Overlay Test Structures", Smart Sensors, Actuators and MEMS, Proc. SPIE, Vol. 5116, May 2003, pp. 617-626.
2. C. Gui, W. v. Buel, F. Bijnen and J. Lof, "Extended front-to-back alignment capability for MEMS/MOEMS Applications", Emerging Lithographic Technologies VI, Proc. SPIE Vol. 4688, 2002, pp 867-873
3. F. Bijnen, W. v. Buel, C. Gui and J. Lof, "Front-to-back alignment metrology", Emerging Lithographic Technologies VII, Proc. SPIE Vol. 5037, pp 641-646
4. L.J. van der Pauw, "A method of measuring specific resistivity and hall effects of discs of arbitrary shape" , Philips Res. Rep. vol 13. pp 1-9 1958