Flip-chip-to-wafer stacking: Enabling technology for volume production of 3D system integration on wafer level

15th European Microelectronics and Packaging Conference and Exhibition, EMPC 2005 - Conference Programme and Proceedings

Volumn , Issue , 2005, Pages 107-117

  Scheiring, Christoph ^a   Kostner, Hannes ^a   Lindner, Paul ^b   Pargfrieder, Stefan ^b  

^a Datacon Technology AG   (Austria)

^b EV GROUP   (Austria)

Author keywords

3D packaging; Chip stack; Flip chip; MEMS packaging; Vertical integration; Wafer level packaging

Indexed keywords

FLIP CHIP DEVICES; INTEGRATED CIRCUIT INTERCONNECTS; MICROELECTRONICS; PACKAGING;

3D PACKAGING; CHIP STACK; FLIP CHIP; MEMS PACKAGING; VERTICAL INTEGRATION; WAFER LEVEL PACKAGING;

CHIP SCALE PACKAGES;

EID: 85064646435     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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4. www.ziptronix.com
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8. L. Bernstein, H. Bartolomew: "Applications of Solid-Liquid Interdiffusion (SOLID) Bonding in Integrated-Circuit Fabrication", Trans. Met. Soc. AIME, Vol. 236, 1996, p. 404.