Packaging properties of ALIVH-CSP using SBB flip-chip bonding technology

Proceedings - 1998 International Conference on Multichip Modules and High Density Packaging

Volumn 1998-April, Issue , 1998, Pages 236-241

  Itagaki, M ^a   Amami, K ^a   Tomura, Y ^a   Yuhaku, S ^a   Noda, O ^a   Bessho, Y ^a   Eda, K ^a   Ishida, T ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

ALIVH substrate; CSP; packaging reliabilities; SBB flip chip bonding

Indexed keywords

FLIP CHIP DEVICES; MICROPROCESSOR CHIPS; MULTICHIP MODULES; RELIABILITY;

FLIP CHIP BONDING; FLIP CHIP TECHNOLOGIES; LAMINATED SUBSTRATES; MULTI-LAYERED; ORGANIC SUBSTRATE; PACKAGING RELIABILITIES; STUD BUMP BONDING; SUBSTRATE SURFACE;

CHIP SCALE PACKAGES;

EID: 85045313633     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICMCM.1998.670786     Document Type: Conference Paper

References (11)

1. T. Goodman, E.J. Vardaman "Worldwide Trends in CSP", Proceedings of the International Packaging Strategy Symposium 97, Tokyo, pp. 51-56, 1997
2. J.H. Lau "Ball Grid Array and Chip Scale Package Technology", Proceedings of the 2uid International Symposium on Ball Grid Array Technology, Minneapolis, Minnesota, 1996
3. Y. Kunitomo, Y. Sakashita, M. Nozu, S. Kageyama, A. Yamamoto, A. Saito, K. Ishikawa "CSP(Chip Size Package)", Proceedings of the 2" VLSI Packaging Workshop of Japan, Kyoto, pp. 51-56, 1994
4. Y. Nakamura, T. Ishida, Y. Bessho, Y. Tomura, M. Tsukamoto "Advanced LSI Package Using Stud. Bump-Bonding Technology", Proceedings of 1995 International Conference on Multichip Modules, Denver, Colorado, pp. 302-307, 1995
5. M. Itagaki, Y. Bessho, K. Eda, T. lshida "A Zero XY Shrinkage LTCC Substrate Using Ag and AgPd Conductors for Flip-Chip Bonding", Proceedings of the 29th International Symposium on Microelectronics, Minneapolis, Minnesota, pp. 55-59, 1996.
6. Y. Bessho, Y. Tomura, Y. Hakota, ii, M. Tsukamoto, T. Ishida, K. Omoya "A Stud-Bump-Bonding Technique for High Density Multi-Chip-Module", Proceedings of the 1993 Japan International Electronic Manufacturing Technology Symposium, Kanazawa, pp. 362-365, 1993.
7. R. Ghaffarian, N.P. Kim "Ball Grid Array Reliability Assessment for Aerospace Applications", Proceedings of the 30th International Symposium on Microelectronics, Philadelphia, Pennsylvania, pp. 396-401, 1997.
8. K. Yamaguchi, M. Higashi, N. Hamada, H. Yonekura, S. Oike, Y. Kunimatsu "Improvement of Solder Joint Reliability between Multilayer Ceramic Package and Printed Wiring Board", Proceedings of the 1st 1997 IEMT/IMC Symposium, Tokyo, pp. 342-34:7, 1997
9. T. Nishii, S. Nakamura, T. Takenaka, S. Nakatani "Performance of Any Layer IVH Structure Multilayered Printed Wiring Board", Proceedings of 1995 Japan International Electronic Manufacturing Technology Symposium, Omiya, pp. 93-96, 1995
10. Y. Bessho, Y. Tomura, T. Shiraishi, M. Ono, T. Ishida, K. Omoya "Advanced Flip-Chip Bonding Technique to Organic Substrate", Proceedings of the 28th International Symposium on Microelectronics, Los Angeles, California, pp. 359-364, 1995
11. T. Shiraishi, K. Amami, S. Yuhaku, Y. Bessho, K. Eda, T. Ishida "Stud-Bump Bonding Technique onto an Advanced Organic Substrate for MCM-Ls", Proceedings of the 6th International Conference and Exhibition on Multichip Modules, Denver, Colorado, pp. 109-114, 1997