How to Successfully Overcome Inflection Points, or Long Live Moore's Law

Computing in Science and Engineering

Volumn 19, Issue 2, 2017, Pages 51-62

  Gargini, Paolo A ^a  

^a International Roadmap for Devices and Systems (IRDS)   (United States)

Author keywords

memory; Moore's law; scaling; scientific computing

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTATION THEORY; DATA STORAGE EQUIPMENT; NATURAL SCIENCES COMPUTING; SEMICONDUCTOR DEVICE MANUFACTURE;

COMPUTING PERFORMANCE; ECONOMICALLY VIABLE; HETEROGENEOUS MEMORY; INFLECTION POINTS; MOORE'S LAW; OPERATING FREQUENCY; SCALING; SEMICONDUCTOR INDUSTRY;

TRANSISTORS;

EID: 85016279166     PISSN: 15219615     EISSN: None     Source Type: Journal    
DOI: 10.1109/MCSE.2017.32     Document Type: Article

References (14)

1. G.E. Moore, "Cramming More Components onto Integrated Circuits, " Electronics, vol. 38, no. 8, 1965, p p. 114-117.
2. G.E. Moore, "Progress in Digital Integrated Circuits, " plenary address, Int'l Electron Devices Conf., 1975, pp. 11-13, 1975.
3. R.H. Dennard et al., "Design of Ion-Implanted MOS-FETs with Very Small Physical Dimensions, " IEEE J. Solid State Circuits, vol. SC-9, no. 5, 1974, pp. 256-268.
4. M. Bohr, "14nm Process Technology Opening New Horizons, " Intel Development Forum, 2014; http://download.intel.com/newsroom/kits/14nm/pdfs/Intel-14nm-New-uArch.pdf.
5. P.A. Gargini, "Enlightenment Beyond Classical CMOS, " Industry Strategic Symp., 2002; www. rea lworldtech.com/iedm-2003-day-2/3/.
6. P. Gelsinger et al., "2001: A Microprocessor Odyssey, " The Future of Computing and Communications, MIT Press, 1991, pp. 95-113.
7. P.A. Gelsinger, "Microprocessors for the New Millennium, " plenary address, Int'l Solid-State Circuits Conf., 2001, pp. 6-17.
8. B. Holt, "Moore's Law: A Path Forward, " plenary address, Int'l Solid-State Circuits Conf., 2016, pp. 8-11.
9. A.C. Seabaugh and Q. Zhang, "Low-Voltage Tunnel Transistors for Beyond CMOS Logic, " Proc. IEEE, vol. 98, no. 12, 2010, pp. 2095-2110.
10. K. Asharf, S. Smith, and S. Salahuddin, " Electric Field Induced Magnetic Switching at Room Temperature: Switching Speed, Device Scaling and Switching Energy, " Proc. Int'l Electron Devices Conf., 2012, pp. 601-60 4.
11. K.S. Li et al., "Sub-60mV-Swing Negative-Capacitance FinFET without Hysteresis, " Proc. Int' l Electron Devices Conf., 2015, pp. 620-623.
12. M.M. Shulaker et al., "Carbon Nanotube Computer, " Nature, vol. 501, Sept. 2013, pp. 526-530.
13. M. Aly et al., "Energy-Efcient Abundant-Data Computing: The N3XT 1, 000X, " Computer, Dec. 2015, pp. 24-33.
14. P.A. Gargini, " Silicon Nanoelectronics and Beyond, " J. Nanoparticle Research, vol. 6, 2004, pp. 11-26.