Widely Programmable High-Frequency Continuous-Time Filters in Digital CMOS Technology

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 4, 2000, Pages 503-511

  Pavan, Shanthi ^a   Tsividis, Yannis P ^b   Nagaraj, Krishnaswamy ^a  

^a TEXAS INSTRUMENTS   (United States)

^b Columbia University ^*  (United States)

Author keywords

Accumulation; CMOS; continuous time filter; digitally programmable; fixed transconductance; scaling; tuning

Indexed keywords

EID: 85008050090     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.839910     Document Type: Article

References (19)

1. J. Fields, P. Aziz, J. Bailey, F. Barber, J. Barner, M. Heimann, P. Kempsey, L. Mantz, A. Mastrocola, R. Peruzzi, T. Peterson, J. Raisinghani, R. Raushmeyer, M. Saniski, N. Sayiner, P. Setty, and S. Tedja, “A 200 Mb/s CMOS EPRML channel with integrated servo demodulator for magnetic hard disks,” in Proc. Int. Solid-State Circuits Conf., San Francisco, CA, Feb. 6-8, 1997, pp. 314-315.
2. H. Samavati, A. Hajimiri, A. Shahani, G. Nasserbakht, and T. Lee, “Fractal capacitors,” in Proc. Int. Solid-State Circuits Conf., San Francisco, CA, Feb. 5-7, 1998, pp. 256-257.
3. L. J. Pu and Y. Tsividis, “Transistor only frequency selective circuits,” IEEE J. Solid-State Circuits, vol. 25, pp. 821-832, June 1990.
4. M. Snelgrove and A. Shoval, “A CMOS biquad at VHF,” in Proc. Custom Integrated Circuits Conf., May 1991, pp. 9.1.1-9.1.6.
5. A. Behr, M. Schneider, S. Filho, and C. Montoro, “Harmonic distortion caused by capacitors implemented with MOSFET gates,”IEEE J. SolidState Circuits, vol. 27, pp. 1470-1475, Oct. 1992.
6. S. Pavan, Y. Tsividis, and K. Nagaraj, “Modeling of accumulation MOS capacitors for analog design in digital VLSI processes,”Proc. IEEE Int. Symp. Circuits and Systems, vol. 6, pp. 202-205, June 1999.
7. Y. Tsividis, “Integrated continuous-time filter design-An overview,” IEEE J. Solid-State Circuits, vol. 29, pp. 166-176, Mar. 1994.
8. G. Groenewold, “The design of high dynamic range continuous-time integratable bandpass filters,” IEEE Trans. Circuits Syst., vol. 38, pp. 836-852, Aug. 1991.
9. G. Efthivoulidis, L. Toth, and Y. P. Tsividis, “Noise in Gm-C filters,” IEEE Trans. CircuitsSyst. II, vol. 45, pp. 295-302, Mar. 1998.
10. Z. Czarnul, Y. Tsividis, and S. C. Fang, “MOS transconductors and integrators with high linearity,” Electron. Lett., vol. 22, pp. 245-246, 1986.
11. V. Gopinathan, Y. Tsividis, K. Tan, and R. Hester, “Design considerations for high-frequency continuous-time filters and implementation of an antialiasing filter for digital video,” IEEEJ. Solid-State Circuits, vol. 25, pp. 1368-1378, Dec. 1990.
12. J. Khoury, “Design of a 15-MHz CMOS continuous-time filter with on-chip tuning,” IEEE J. Solid-State Circuits, vol. 26, pp. 1988-1997, Dec. 1991.
13. I. Mehr and D. Welland, “A CMOS continuous-time Gm-C filter for PRML read channel applications at 150 Mb/s and beyond,” IEEE J. Solid-State Circuits, vol. 32, pp. 499-513, Apr. 1997.
14. R. Schaumann, “Continuous-time integrated filters-A tutorial,” in Integrated Continuous-TimeFilters-Principles, Design and Applications, Y. P. Tsividis and J. O. Voorman, Eds. Piscataway, NJ: IEEE Press, 1992.
15. R. Schaumann, K. Laker, and M. Ghausi, Modern Filter Design-Passive, Active-RC and Switched-Capacitor. Englewood Cliffs, NJ: Prentice-Hall, 1992.
16. S. Pavan and Y. Tsividis, “Time scaled electrical networks-Properties and applications in the design of programmable analog filters,” IEEE Trans. Circuits Syst. II, vol. 47, pp. 161-165, Feb. 2000.
17. S. Pavan, “High Frequency Continuous-Time Filters in Digital CMOS Processes,” Ph.D. Dissertation, Columbia University, New York, NY, May 1999.
18. R. Zele and D. Allstot, “Low power CMOS continuous-time filters,” IEEE J. Solid-State Circuits, vol. 31, pp. 157-168, Feb. 1996.
19. B. Nauta, “A CMOS transconductance-C filter technique for very high frequencies,” IEEE J. Solid-State Circuits, vol. 27, pp. 142-153, Feb. 1992.