Adaptive Window Control (AWC) Technique for Hysteresis DC-DC Buck Converters With Improved Light and Heavy Load Performance

IEEE Transactions on Power Electronics

Volumn 24, Issue 6, 2009, Pages 1607-1617

  Huang, Han Hsiang ^a   Chen, Chi Lin ^a   Chen, Ke Horng ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Adaptive window control; hysteresis converter; output ripple

Indexed keywords

EID: 85008049770     PISSN: 08858993     EISSN: 19410107     Source Type: Journal    
DOI: 10.1109/TPEL.2009.2014687     Document Type: Article

References (19)

1. H.-W. Huang, K.-H. Chen, and S.-Y. Kuo, “Dithering skip modulation, width and dead time controllers in highly efficient DC-DC Converters for system-on-chip applications,” IEEE J. Solid-State Circuits, vol. 42, no. 11, pp. 2451–2465, Nov. 2007.
2. K.-H. Chen, H.-W. Huang, and S.-Y. Kuo, “Fast transient DC-DC converter with on-chip compensated error amplifier,” IEEE Trans. Circuits Syst. II, vol. 54, no. 12, pp. 1150–1154, Dec. 2007.
3. M. Siu, P. K. T. Mok, K. N. Leung, Y.-H. Lam, and W.-H. Ki, “A voltage-mode PWM buck regulator with end-point prediction,” IEEE Trans. Circuits Syst. II, vol. 53, no. 4, pp. 294–298, Apr. 2006.
4. F. Su, W.-H. Ki, and C.-Y. Tsui, “Ultra fast fixed-frequency hysteretic buck converter with maximum charging current control and adaptive delay compensation for DVS applications,” IEEE J. Solid-State Circuits, vol. 43, no. 4, pp. 815–822, Apr. 2008.
5. V. Gutnik and A. P. Chandrakasan, “Embedded power supply for low power DSP,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 5, no. 4, pp. 425–435, Dec. 1997.
6. T. Kuroda, K. Suzuki, S. Mita, T. Fujita, F. Yamane, F. Sano, A. Chiba, Y. Watanabe, K. Matsuda, T. Maeda, T. Sakurai, and T. Furuyama, “Variable supply-voltage scheme for low-power high-speed CMOS digital design,” IEEE J. Solid-State Circuits, vol. 33, no. 3, pp. 454–462, Mar. 1998.
7. G. Wei, J. Kim, D. Liu, S. Sidiropoulos, and M. Horowitz, “A variable-frequency parallel I/O interface with adaptive power supply regulation,” in IEEE ISSCC Tech. Dig. Papers, 2000, pp. 298–299.
8. T. D. Burd, T. A. Pering, A. J. Stratakos, and R. W. Brodersen, “A dynamic voltage scaled microprocessor system,” IEEE J. Solid-State Circuits, vol. 35, no. 11, pp. 1571–1580, Nov. 2000.
9. C.-L. Chen, W.-L. Hsieh, H.-H. Huang, and K.-H. Chen, “Fast mode-switching technique in hybrid-mode operation,” in Proc. 51st IEEE Int. Midwest Symp. Circuits Syst., Aug. 2008, pp. 9–12.
10. C.-Y. Hsieh and K.-H. Chen, “Adaptive pole-zero position (APZP) technique of regulated power supply for improving SNR,” IEEE Trans. Power Electron., vol. 23, no. 6, pp. 2949–2963, Nov. 2008.
11. H.-W. Huang, C.-Y. Hsieh, K.-H. Chen, and S.-Y. Kuo, “Adaptive frequency control technique for enhancing transient performance of DC-DC converters,” in Proc. 33rd Eur. Solid-State Circuits Conf. (ESSCIRC), Sep. 2007, pp. 174–177.
12. A. Barrado, A. Lázaro, R. Vázquez, V. Salas, and E. Olías, “The fast response double buck DC-DC converter (FRDB) operation and output filter influence,” IEEE Trans. Power Electron., vol. 20, no. 6, pp. 1261–1270, Nov. 2005.
13. K. Yao, K. Lee, M. Xu, and F. C. Lee, “Optimal design of the active droop control method for the transient response,” in Proc. IEEE Appl. Power Electron. Conf. Expo., Feb. 2003, vol. 2, pp. 718–723.
14. J. Roh, “High-performance error amplifier for fast transient DC-DC converters,” IEEE Trans. Circuits Syst. II, vol. 52, no. 9, pp. 591–595, Sep. 2005.
15. M. Castilla, L. Garcia de Vicuna, J. M. Guerrero, J. Miret, and N. Berbel, “Simple low-cost hysteretic controller for single-phase synchronous buck converters,” IEEE Trans. Power Electron., vol. 22, no. 4, pp. 1232–1241, Jul. 2007.
16. “Designing fast response synchronous buck regulators using the TPS 5210,” Texas Instruments Incorporated, Texas, USA, Application Rep., Mar. 1999.
17. R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics. Norwell, MA: Kluwer, 2001.
18. K.-H. Chen, C.-J. Chang, and T.-H. Liu, “Bidirectional current-mode capacitor multipliers for on-chip compensation,” IEEE Trans. Power Electron., vol. 23, no. 1, pp. 180–188, Jan. 2008.
19. C. Y. Leung, P. K. T. Mok, K. N. Leung, and M. Chan, “An integrated CMOS current-sensing circuit for low-voltage current-mode buck regulator,” IEEE Trans. Circuits Syst. II, vol. 52, no. 7, pp. 394–397, Jul. 2005.