-
2
-
-
84988434040
-
The rocket chip generator
-
University of California, Berkeley, Apr
-
Krste Asanović, Rimas Avizienis, Jonathan Bachrach, Scott Beamer, David Biancolin, Christopher Celio, Henry Cook, Daniel Dabbelt, John Hauser, Adam Izraelevitz, Sagar Karandikar, Ben Keller, Donggyu Kim, John Koenig, Yunsup Lee, Eric Love, Martin Maas, Albert Magyar, Howard Mao, Miquel Moreto, Albert Ou, David A. Patterson, Brian Richards, Colin Schmidt, Stephen Twigg, Huy Vo, and Andrew Waterman. The rocket chip generator. Technical Report UCB/EECS-2016-17, EECS Department, University of California, Berkeley, Apr 2016.
-
(2016)
Technical Report UCB/EECS-2016-17, EECS Department
-
-
Asanović, K.1
Avizienis, R.2
Bachrach, J.3
Beamer, S.4
Biancolin, D.5
Celio, C.6
Cook, H.7
Dabbelt, D.8
Hauser, J.9
Izraelevitz, A.10
Karandikar, S.11
Keller, B.12
Kim, D.13
Koenig, J.14
Lee, Y.15
Love, E.16
Maas, M.17
Magyar, A.18
Mao, H.19
Moreto, M.20
Ou, A.21
Patterson, D.A.22
Richards, B.23
Schmidt, C.24
Twigg, S.25
Vo, H.26
Waterman, A.27
more..
-
3
-
-
84863554443
-
Chisel: Constructing hardware in a scala embedded language
-
ACM
-
Jonathan Bachrach, Huy Vo, Brian Richards, Yunsup Lee, Andrew Waterman, Rimas Avižienis, John Wawrzynek, and Krste Asanović. Chisel: constructing hardware in a scala embedded language. In Proceedings of the 49th Annual Design Automation Conference, pages 1216-1225. ACM, 2012.
-
(2012)
Proceedings of the 49th Annual Design Automation Conference
, pp. 1216-1225
-
-
Bachrach, J.1
Vo, H.2
Richards, B.3
Lee, Y.4
Waterman, A.5
Avižienis, R.6
Wawrzynek, J.7
Asanović, K.8
-
4
-
-
44849085127
-
An energy-efficient processor architecture for embedded systems
-
Jan
-
J. Balfour, W. Dally, D. Black-Schaffer, V. Parikh, and J. Park. An energy-efficient processor architecture for embedded systems. IEEE Computer Architecture Letters, 7(1):29-32, Jan 2008.
-
(2008)
IEEE Computer Architecture Letters
, vol.7
, Issue.1
, pp. 29-32
-
-
Balfour, J.1
Dally, W.2
Black-Schaffer, D.3
Parikh, V.4
Park, J.5
-
5
-
-
70450237431
-
Rigel: An architecture and scalable programming interface for a 1000-core accelerator
-
New York, NY, USA ACM
-
John H. Kelm, Daniel R. Johnson, Matthew R. Johnson, Neal C. Crago, William Tuohy, Aqeel Mahesri, Steven S. Lumetta, Matthew I. Frank, and Sanjay J. Patel. Rigel: An architecture and scalable programming interface for a 1000-core accelerator. In Proceedings of the 36th Annual International Symposium on Computer Architecture, ISCA '09, pages 140-151, New York, NY, USA, 2009. ACM.
-
(2009)
Proceedings of the 36th Annual International Symposium on Computer Architecture, ISCA '09
, pp. 140-151
-
-
Kelm, J.H.1
Johnson, D.R.2
Johnson, M.R.3
Crago, N.C.4
Tuohy, W.5
Mahesri, A.6
Lumetta, S.S.7
Frank, M.I.8
Patel, S.J.9
-
6
-
-
1342282613
-
Scalable, vector processors for embedded systems
-
Nov
-
C. E. Kozyrakis and D. A. Patterson. Scalable, vector processors for embedded systems. IEEE Micro, 23(6):36-45, Nov 2003.
-
(2003)
IEEE Micro
, vol.23
, Issue.6
, pp. 36-45
-
-
Kozyrakis, C.E.1
Patterson, D.A.2
-
8
-
-
84909943884
-
A 45nm 1.3ghz 16.7 double-precision gflops/w risc-v processor with vector accelerators
-
Sept
-
Y. Lee, A. Waterman, R. Avizienis, H. Cook, C. Sun, V. Stojanović, and K. Asanović. A 45nm 1.3ghz 16.7 double-precision gflops/w risc-v processor with vector accelerators. In European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014-40th, pages 199-202, Sept 2014.
-
(2014)
European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014-40th
, pp. 199-202
-
-
Lee, Y.1
Waterman, A.2
Avizienis, R.3
Cook, H.4
Sun, C.5
Stojanović, V.6
Asanović, K.7
-
9
-
-
80052543989
-
Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators
-
June
-
Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, and Krste Asanović. Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators. SIGARCH Comput. Archit. News, 39(3):129-140, June 2011.
-
(2011)
SIGARCH Comput. Archit. News
, vol.39
, Issue.3
, pp. 129-140
-
-
Lee, Y.1
Avizienis, R.2
Bishara, A.3
Xia, R.4
Lockhart, D.5
Batten, C.6
Asanović, K.7
-
10
-
-
84991090907
-
The hwacha microarchitecture manual, version 3.8.1
-
University of California, Berkeley, Dec
-
Yunsup Lee, Albert Ou, Colin Schmidt, Sagar Karandikar, Howard Mao, and Krste Asanović. The hwacha microarchitecture manual, version 3.8.1. Technical Report UCB/EECS-2015-263, EECS Department, University of California, Berkeley, Dec 2015.
-
(2015)
Technical Report UCB/EECS-2015-263, EECS Department
-
-
Lee, Y.1
Ou, A.2
Schmidt, C.3
Karandikar, S.4
Mao, H.5
Asanović, K.6
-
11
-
-
85060049326
-
Hwacha preliminary evaluation results, version 3.8.1
-
University of California, Berkeley, Dec
-
Yunsup Lee, Colin Schmidt, Sagar Karandikar, Daniel Dabbelt, Albert Ou, and Krste Asanović. Hwacha preliminary evaluation results, version 3.8.1. Technical Report UCB/EECS-2015-264, EECS Department, University of California, Berkeley, Dec 2015.
-
(2015)
Technical Report UCB/EECS-2015-264, EECS Department
-
-
Lee, Y.1
Schmidt, C.2
Karandikar, S.3
Dabbelt, D.4
Ou, A.5
Asanović, K.6
-
12
-
-
84991090907
-
The hwacha vector-fetch architecture manual, version 3.8.1
-
University of California, Berkeley, Dec
-
Yunsup Lee, Colin Schmidt, Albert Ou, Andrew Waterman, and Krste Asanović. The hwacha vector-fetch architecture manual, version 3.8.1. Technical Report UCB/EECS-2015-262, EECS Department, University of California, Berkeley, Dec 2015.
-
(2015)
Technical Report UCB/EECS-2015-262, EECS Department
-
-
Lee, Y.1
Schmidt, C.2
Ou, A.3
Waterman, A.4
Asanović, K.5
-
13
-
-
84980390313
-
Raven: A 28nm risc-v vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking
-
Yunsup Lee, Brian Zimmer, Andrew Waterman, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Henry Cook, Rimas Avizienis, Brian Richards, Elad Alon, Borivoje Nikolic, and Krste Asanovic. Raven: A 28nm risc-v vector processor with integrated switched-capacitor dc-dc converters and adaptive clocking. HotChips, 2015.
-
(2015)
HotChips
-
-
Lee, Y.1
Zimmer, B.2
Waterman, A.3
Puggelli, A.4
Kwak, J.5
Jevtic, R.6
Keller, B.7
Bailey, S.8
Blagojevic, M.9
Chiu, P.-F.10
Cook, H.11
Avizienis, R.12
Richards, B.13
Alon, E.14
Nikolic, B.15
Asanovic, K.16
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