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Volumn 2016-August, Issue , 2016, Pages
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DeepBurning: Automatic generation of FPGA-based learning accelerators for the Neural Network family
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Author keywords
Hardware Software co simulation; High Level Synthesis; SoC design; Verification
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Indexed keywords
ACCELERATION;
ARTIFICIAL INTELLIGENCE;
AUTOMATION;
COMPUTER AIDED DESIGN;
COMPUTER VISION;
DESIGN;
ENERGY EFFICIENCY;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
HARDWARE;
HIGH LEVEL SYNTHESIS;
LEARNING SYSTEMS;
PROGRAMMABLE LOGIC CONTROLLERS;
RECONFIGURABLE HARDWARE;
SYSTEM-ON-CHIP;
VERIFICATION;
APPLICATION DEVELOPERS;
AUTOMATIC GENERATION;
COSIMULATION;
DESIGN-AUTOMATION TOOLS;
NEURAL NETWORK FAMILY;
OPTIMIZED PERFORMANCE;
SOC DESIGNS;
USER-SPECIFIED CONSTRAINTS;
INTEGRATED CIRCUIT DESIGN;
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EID: 84985993737
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/2897937.2898002 Document Type: Conference Paper |
Times cited : (52)
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References (11)
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