Magnetic Tunnel Junction Based Long-Term Short-Term Stochastic Synapse for a Spiking Neural Network with On-Chip STDP Learning

Scientific Reports

Volumn 6, Issue , 2016, Pages

  Srinivasan, Gopalakrishnan ^a   Sengupta, Abhronil ^a   Roy, Kaushik ^a  

^a Purdue University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84978382702     PISSN: None     EISSN: 20452322     Source Type: Journal    
DOI: 10.1038/srep29545     Document Type: Article

References (27)

1. Diehl, P. U. & Cook, M. Unsupervised learning of digit recognition using spike-timing-dependent plasticity. Front. Comput. Neurosci. 9, 1-9 (2015).
2. Rast, A. D., Yang, S., Khan, M. & Furber, S. B. Virtual synaptic interconnect using an asynchronous network-on-chip. Paper presented at IEEE International Joint Conference on Neural Networks (IJCNN), Hong Kong, doi: 10.1109/IJCNN.2008.4634181. (Jun 1, 2008).
3. Merolla, P. A. et al. A million spiking-neuron integrated circuit with a scalable communication network and interface. Science 345, 668-673 (2014).
4. Suri, M. et al. Phase change memory as synapse for ultra-dense neuromorphic systems: Application to complex visual pattern extraction. Paper presented at IEEE International Electron Devices Meeting (IEDM). Washington, DC, doi: 10.1109/IEDM.2011.6131488. (Dec 5, 2011).
5. Jo, S. H. et al. Nanoscale Memristor Device as Synapse in Neuromorphic Systems. Nano Lett. 10, 1297-1301 (2010).
6. Sengupta, A., Azim, Z. A., Fong, X. & Roy, K. Spin-orbit torque induced spike-timing dependent plasticity. Appl. Phys. Lett. 106, 093704 (2015).
7. Sengupta, A., Banerjee, A. & Roy, K. Hybrid Spintronic-CMOS Spiking Neural Network With On-Chip Learning: Devices, Circuits and Systems. arXiv:1510.00432. (Nov 13, 2015).
8. Branco, T. & Staras, K. The probability of neurotransmitter release: variability and feedback control at single synapses. Nat. Rev. Neurosci. 10, 373-383 (2009).
9. Indiveri, G., Linares-Barranco, B., Legenstein, R., Deligeorgis, G. & Prodromakis, T. Integration of nanoscale memristor synapses in neuromorphic computing architectures. Nanotechnology 24, 384010 (2013).
10. Vincent, A. F. et al. Spin-transfer torque magnetic memory as a stochastic memristive synapse. Paper presented at IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, VIC, doi: 10.1109/ISCAS.2014.6865325. (Jun 1, 2014).
11. Suri, M. et al. Bio-Inspired Stochastic Computing Using Binary CBRAM Synapses. IEEE Trans. Electron Dev. 60, 2402-2409 (2013).
12. Bi, G. & Poo, M. Synaptic modification by correlated activity: Hebb's Postulate Revisited. Annu. Rev. Neurosci. 24, 139-166 (2001).
13. Morris, R. G. M. DO Hebb: The Organization of Behavior, Wiley: New York; 1949. Brain Res. Bull. 50, 437 (1999).
14. Atkinson, R. C. & Shiffrin, R. M. Human Memory: A Proposed System and its Control Processes. Psychol. Learn. Motiv. 2, 89-195 (1968).
15. Ghosh-Dastidar, S. & Adeli, H. Spiking neural networks. Int. J. Neural Syst. 19, 295-308 (2009).
16. Pai, C. F. et al. Spin transfer torque devices utilizing the giant spin Hall effect of tungsten. Appl. Phys. Lett. 101, 122404 (2012).
17. Miron, I. M. et al. Perpendicular switching of a single ferromagnetic layer induced by in-plane current injection. Nature 476, 189-193 (2011).
18. Slonczewski, J. C. Conductance and exchange coupling of two ferromagnets separated by a tunneling barrier. Phys. Rev. B 39, 6995 (1989).
19. Beleggia, M., Graef, M. D., Millev, Y. T., Goode, D. A. & Rowlands, G. Demagnetization factors for elliptic cylinders. J. Phys. D: Appl. Phys. 38, 3333-3342 (2005).
20. Scholz, W., Schrefl, T. & Fidler, J. Micromagnetic simulation of thermally activated switching in fine particles. J. Magn. Magn. Mater. 233, 296-304 (2001).
21. Kavehei, O. & Skafidas, E. Highly scalable neuromorphic hardware with 1-bit stochastic nano-synapses. Paper presented at IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, VIC, doi: 10.1109/ISCAS.2014.6865468. (Jun 1, 2014).
22. Lazzaro, J. & Wawrzynek, J. Low-power silicon neurons, axons and synapses. In Silicon Implementation of Pulse Coded Neural Networks (eds. Zaghloul, M. E. et al.) 153-164 (Springer, 1994).
23. Rajendran, B. et al. Specifications of Nanoscale Devices and Circuits for Neuromorphic Computational Systems. IEEE Trans. Electron Dev. 60, 246-253 (2013).
24. Seo, J. S. et al. A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons. Paper presented at IEEE Custom Integrated Circuits Conference (CICC). San Jose, CA, doi: 10.1109/CICC.2011.6055293. (Sep 19, 2011).
25. Lecun, Y., Bottou, L., Bengio, Y. & Haffner, P. Gradient-based learning applied to document recognition. Proceedings of the IEEE 86, 2278-2324 (1998).
26. Goodman, D. & Brette, R. Brian: a simulator for spiking neural networks in Python. Front. Neuroinform. 2, 1-10 (2008).
27. Meng, Y., Zhou, K., Monzon, J. J. C. & Poon, C. S. Iono-neuromorphic implementation of spike-timing-dependent synaptic plasticity. Paper presented at the Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC). Boston, MA, doi: 10.1109/IEMBS.2011.6091838. (Aug 30, 2011).