Effect of the process flow on negative-bias-temperature-instability

International Symposium on Plasma Process-Induced Damage, P2ID, Proceedings

Volumn 2003-January, Issue , 2003, Pages 142-145

  Scarpa, A ^a   Van Marwijk, L ^a   Cacciato, A ^a   Ballarin, F ^a  

^a NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

MOSFET DEVICES; PLASMA STABILITY;

HIGH TEMPERATURE AGING; MANUFACTURING PROCESS; NEGATIVE BIAS TEMPERATURE INSTABILITY; PARAMETRIC DEGRADATION; PHENOMENOLOGICAL APPROACH; PLASMA-INDUCED; PROCESS FLOWS; PROCESS STEPS;

PLASMA DIAGNOSTICS;

EID: 84973659391     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PPID.2003.1200943     Document Type: Conference Paper

References (10)

1. th International Reliability Physics Symposium (IRPS), Denver (USA), April 1997, pp. 282-286.
2. th International Reliability Physics Symposium (IRPS), Dallas (USA), April 2002, pp. 248-254.
3. T. Yamamoto, K. Uwasawa and T. Mogami, "Bias temperature instability in scaled p+ polysilicon gate pMOSFET's", IEEE Trans. on Electron Devices, 46 (5), 1999, pp. 921-926.
4. C. Hu, S.C. Tam, F.-C. Hsu, P.-K. Ko, T.-Y. Chan and K.W. Terrill, "Hot-electron-induced MOSFET degradation - Model, Monitor, and improvement", IEEE Trans. on Electron Devices, 32 (2), 1985, pp. 375-385.
5. T.B. Hook, E. Adler, F. Guarin, J. Lukaitis, N. Rovedo and K. Shruefer, "The effect of fluorine on parametrics and reliability in a 0.18-μm 3.5/6.8 nm dual gate oxide CMOS technology", IEEE Trans. on Electron Devices, 48 (7), 2001, pp. 1346-1353.
6. 2 interface states", Appl. Phys. Lett. 65 (19), 1994, pp. 2428-2430.
7. C.E. Blat, E.H. Nicollian and E.H. Poindexter, "Mechanism of negative-bias-temperature-instability", J. Appl. Phys., 69 (3), 1991, pp. 1712-1720.
8. T.P. Ma and P.V. Dressendorfer, in "Ionizing radiation effects in MOS devices & circuits", Ed. T.P. Ma and P.V. Dressendorfer, John Whiley and Sons, Ch. 1, p.1, New York, 1989.
9. G. Groeseneken, H.E. Maes, N. Beltran and R.F. de Keersmaecker, "A reliable approach to charge-pumping measurements in MOS transistors", IEEE Trans. on Electron Devices, 31 (1), 1984, pp. 42-53.
10. A.T. Krishnan, V. Reddy and S. Krishnan., "Impact of charging damage on negative bias temperature instability", in Proc. of International Electron Devices Meeting (IEDM), Washington, DC (USA), Dec. 2001.